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[Commits] r18492 - in /fsf/trunk/libc: ./ elf/ nptl/ nptl/sysdeps/x86_64/x32/ sysdeps/sparc/fpu/ sysdeps/sparc/fpu/bits/
- To: commits@xxxxxxxxxx
- Subject: [Commits] r18492 - in /fsf/trunk/libc: ./ elf/ nptl/ nptl/sysdeps/x86_64/x32/ sysdeps/sparc/fpu/ sysdeps/sparc/fpu/bits/
- From: eglibc@xxxxxxxxxx
- Date: Sat, 12 May 2012 00:01:58 -0000
Author: eglibc
Date: Sat May 12 00:01:57 2012
New Revision: 18492
Log:
Import glibc-mainline for 2012-05-12
Added:
fsf/trunk/libc/nptl/sysdeps/x86_64/x32/
fsf/trunk/libc/nptl/sysdeps/x86_64/x32/tls.h
Modified:
fsf/trunk/libc/ChangeLog
fsf/trunk/libc/elf/stackguard-macros.h
fsf/trunk/libc/elf/tls-macros.h
fsf/trunk/libc/nptl/ChangeLog
fsf/trunk/libc/sysdeps/sparc/fpu/bits/fenv.h
fsf/trunk/libc/sysdeps/sparc/fpu/fpu_control.h
Modified: fsf/trunk/libc/ChangeLog
==============================================================================
--- fsf/trunk/libc/ChangeLog (original)
+++ fsf/trunk/libc/ChangeLog Sat May 12 00:01:57 2012
@@ -1,3 +1,23 @@
+2012-05-11 H.J. Lu <hongjiu.lu@xxxxxxxxx>
+
+ * elf/stackguard-macros.h (STACK_CHK_GUARD) [__x86_64__]: Use
+ "%c1" with "i" (offsetof (tcbhead_t, stack_guard)).
+
+2012-05-11 H.J. Lu <hongjiu.lu@xxxxxxxxx>
+
+ * elf/tls-macros.h (TLS_LE): Use mov instead of movq to load
+ thread pointer.
+ (TLS_IE): Use mov/add instead of movq/addq to load thread
+ pointer.
+ (TLS_GD_PREFIX): New.
+ (TLS_GD): Use it.
+
+2012-05-11 David S. Miller <davem@xxxxxxxxxxxxx>
+
+ * sysdeps/sparc/fpu/bits/fenv.h (__fenv_stfsr): Add __volatile__.
+ * sysdeps/sparc/fpu/fpu_control.h (_FPU_GETCW): Likewise.
+ (_FPU_SETCW): Likewise.
+
2012-05-10 H.J. Lu <hongjiu.lu@xxxxxxxxx>
* sysdeps/x86_64/dl-trampoline.S: Check if RTLD_SAVESPACE_SSE
Modified: fsf/trunk/libc/elf/stackguard-macros.h
==============================================================================
--- fsf/trunk/libc/elf/stackguard-macros.h (original)
+++ fsf/trunk/libc/elf/stackguard-macros.h Sat May 12 00:01:57 2012
@@ -5,7 +5,9 @@
({ uintptr_t x; asm ("movl %%gs:0x14, %0" : "=r" (x)); x; })
#elif defined __x86_64__
# define STACK_CHK_GUARD \
- ({ uintptr_t x; asm ("movq %%fs:0x28, %0" : "=r" (x)); x; })
+ ({ uintptr_t x; \
+ asm ("mov %%fs:%c1, %0" : "=r" (x) \
+ : "i" (offsetof (tcbhead_t, stack_guard))); x; })
#elif defined __powerpc64__
# define STACK_CHK_GUARD \
({ uintptr_t x; asm ("ld %0,-28688(13)" : "=r" (x)); x; })
Modified: fsf/trunk/libc/elf/tls-macros.h
==============================================================================
--- fsf/trunk/libc/elf/tls-macros.h (original)
+++ fsf/trunk/libc/elf/tls-macros.h Sat May 12 00:01:57 2012
@@ -101,15 +101,15 @@
# define TLS_LE(x) \
({ int *__l; \
- asm ("movq %%fs:0,%0\n\t" \
- "leaq " #x "@tpoff(%0), %0" \
+ asm ("mov %%fs:0,%0\n\t" \
+ "lea " #x "@tpoff(%0), %0" \
: "=r" (__l)); \
__l; })
# define TLS_IE(x) \
({ int *__l; \
- asm ("movq %%fs:0,%0\n\t" \
- "addq " #x "@gottpoff(%%rip),%0" \
+ asm ("mov %%fs:0,%0\n\t" \
+ "add " #x "@gottpoff(%%rip),%0" \
: "=r" (__l)); \
__l; })
@@ -122,9 +122,15 @@
: : "rdi", "rsi", "r8", "r9", "r10", "r11"); \
__l; })
+# ifdef __ILP32__
+# define TLS_GD_PREFIX
+# else
+# define TLS_GD_PREFIX ".byte 0x66\n\t"
+# endif
+
# define TLS_GD(x) \
({ int *__l, __c, __d; \
- asm (".byte 0x66\n\t" \
+ asm (TLS_GD_PREFIX \
"leaq " #x "@tlsgd(%%rip),%%rdi\n\t" \
".word 0x6666\n\t" \
"rex64\n\t" \
Modified: fsf/trunk/libc/nptl/ChangeLog
==============================================================================
--- fsf/trunk/libc/nptl/ChangeLog (original)
+++ fsf/trunk/libc/nptl/ChangeLog Sat May 12 00:01:57 2012
@@ -1,3 +1,7 @@
+2012-05-11 H.J. Lu <hongjiu.lu@xxxxxxxxx>
+
+ * sysdeps/x86_64/x32/tls.h: New file.
+
2012-05-11 H.J. Lu <hongjiu.lu@xxxxxxxxx>
* sysdeps/x86_64/tls.h (THREAD_SETMEM): Use uint64_t on 64-bit
Added: fsf/trunk/libc/nptl/sysdeps/x86_64/x32/tls.h
==============================================================================
--- fsf/trunk/libc/nptl/sysdeps/x86_64/x32/tls.h (added)
+++ fsf/trunk/libc/nptl/sysdeps/x86_64/x32/tls.h Sat May 12 00:01:57 2012
@@ -1,0 +1,46 @@
+/* Definition for thread-local data handling. nptl/x32 version.
+ Copyright (C) 2012 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _X32_TLS_H
+#define _X32_TLS_H 1
+
+#include <sysdeps/x86_64/tls.h>
+
+#ifndef __ASSEMBLER__
+
+/* X32 doesn't support 32-bit indirect calls via memory. Instead, we
+ load the 32-bit address from memory into the lower 32 bits of the
+ return-value register, which will automatically zero-extend the upper
+ 32 bits of the return-value register. We then do the indirect call
+ via the 64-bit return-value register. */
+# undef CALL_THREAD_FCT
+# define CALL_THREAD_FCT(descr) \
+ ({ void *__res; \
+ asm volatile ("movl %%fs:%P2, %%edi\n\t" \
+ "movl %%fs:%P1, %k0\n\t" \
+ "callq *%q0" \
+ : "=a" (__res) \
+ : "i" (offsetof (struct pthread, start_routine)), \
+ "i" (offsetof (struct pthread, arg)) \
+ : "di", "si", "cx", "dx", "r8", "r9", "r10", "r11", \
+ "memory", "cc"); \
+ __res; })
+
+#endif /* __ASSEMBLER__ */
+
+#endif /* x32/tls.h */
Modified: fsf/trunk/libc/sysdeps/sparc/fpu/bits/fenv.h
==============================================================================
--- fsf/trunk/libc/sysdeps/sparc/fpu/bits/fenv.h (original)
+++ fsf/trunk/libc/sysdeps/sparc/fpu/bits/fenv.h Sat May 12 00:01:57 2012
@@ -76,9 +76,9 @@
/* For internal use only: access the fp state register. */
#if __WORDSIZE == 64
-# define __fenv_stfsr(X) __asm__ ("stx %%fsr,%0" : "=m" (X))
+# define __fenv_stfsr(X) __asm__ __volatile__ ("stx %%fsr,%0" : "=m" (X))
# define __fenv_ldfsr(X) __asm__ __volatile__ ("ldx %0,%%fsr" : : "m" (X))
#else
-# define __fenv_stfsr(X) __asm__ ("st %%fsr,%0" : "=m" (X))
+# define __fenv_stfsr(X) __asm__ __volatile__ ("st %%fsr,%0" : "=m" (X))
# define __fenv_ldfsr(X) __asm__ __volatile__ ("ld %0,%%fsr" : : "m" (X))
#endif
Modified: fsf/trunk/libc/sysdeps/sparc/fpu/fpu_control.h
==============================================================================
--- fsf/trunk/libc/sysdeps/sparc/fpu/fpu_control.h (original)
+++ fsf/trunk/libc/sysdeps/sparc/fpu/fpu_control.h Sat May 12 00:01:57 2012
@@ -59,11 +59,11 @@
typedef unsigned long int fpu_control_t;
#if __WORDSIZE == 64
-# define _FPU_GETCW(cw) __asm__ ("stx %%fsr,%0" : "=m" (*&cw))
-# define _FPU_SETCW(cw) __asm__ ("ldx %0,%%fsr" : : "m" (*&cw))
+# define _FPU_GETCW(cw) __asm__ __volatile__ ("stx %%fsr,%0" : "=m" (*&cw))
+# define _FPU_SETCW(cw) __asm__ __volatile__ ("ldx %0,%%fsr" : : "m" (*&cw))
#else
-# define _FPU_GETCW(cw) __asm__ ("st %%fsr,%0" : "=m" (*&cw))
-# define _FPU_SETCW(cw) __asm__ ("ld %0,%%fsr" : : "m" (*&cw))
+# define _FPU_GETCW(cw) __asm__ __volatile__ ("st %%fsr,%0" : "=m" (*&cw))
+# define _FPU_SETCW(cw) __asm__ __volatile__ ("ld %0,%%fsr" : : "m" (*&cw))
#endif
/* Default control word set at startup. */
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