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[Commits] r21452 - in /fsf/trunk/libc: ./ manual/ math/ ports/ ports/sysdeps/mips/ ports/sysdeps/mips/mips64/ ports/sysdeps/unix/sysv/...
- To: commits@xxxxxxxxxx
- Subject: [Commits] r21452 - in /fsf/trunk/libc: ./ manual/ math/ ports/ ports/sysdeps/mips/ ports/sysdeps/mips/mips64/ ports/sysdeps/unix/sysv/...
- From: eglibc@xxxxxxxxxx
- Date: Thu, 01 Nov 2012 00:01:47 -0000
Author: eglibc
Date: Thu Nov 1 00:01:46 2012
New Revision: 21452
Log:
Import glibc-mainline for 2012-11-01
Added:
fsf/trunk/libc/sysdeps/x86/tininess.h
Removed:
fsf/trunk/libc/ports/sysdeps/mips/mips64/memcpy.S
fsf/trunk/libc/sysdeps/i386/tininess.h
fsf/trunk/libc/sysdeps/x86_64/tininess.h
Modified:
fsf/trunk/libc/ChangeLog
fsf/trunk/libc/INSTALL
fsf/trunk/libc/NEWS
fsf/trunk/libc/manual/install.texi
fsf/trunk/libc/math/libm-test.inc
fsf/trunk/libc/ports/ChangeLog.mips
fsf/trunk/libc/ports/ChangeLog.powerpc
fsf/trunk/libc/ports/sysdeps/mips/memcpy.S
fsf/trunk/libc/ports/sysdeps/unix/sysv/linux/powerpc/powerpc32/nofpu/nptl/libc.abilist
fsf/trunk/libc/rt/tst-shm.c
fsf/trunk/libc/sysdeps/ieee754/dbl-64/s_fma.c
fsf/trunk/libc/sysdeps/ieee754/ldbl-128/s_fmal.c
fsf/trunk/libc/sysdeps/ieee754/ldbl-128ibm/e_atan2l.c
fsf/trunk/libc/sysdeps/ieee754/ldbl-96/s_fmal.c
fsf/trunk/libc/sysdeps/powerpc/fpu/libm-test-ulps
fsf/trunk/libc/sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/nptl/libc.abilist
fsf/trunk/libc/sysdeps/unix/sysv/linux/powerpc/powerpc64/nptl/libc.abilist
Modified: fsf/trunk/libc/ChangeLog
==============================================================================
--- fsf/trunk/libc/ChangeLog (original)
+++ fsf/trunk/libc/ChangeLog Thu Nov 1 00:01:46 2012
@@ -1,3 +1,61 @@
+2012-10-31 Thomas Schwinge <thomas@xxxxxxxxxxxxxxxx>
+
+ * rt/tst-shm.c (worker): Correct checking for mmap failure.
+
+2012-10-31 Andreas Schwab <schwab@xxxxxxxxxxxxxx>
+
+ * sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/nptl/libc.abilist:
+ Fix sort order.
+ * sysdeps/unix/sysv/linux/powerpc/powerpc64/nptl/libc.abilist:
+ Likewise.
+
+2012-10-31 Tulio Magno Quites Machado Filho <tuliom@xxxxxxxxxxxxxxxxxx>
+
+ * sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/nptl/libc.abilist:
+ Fix the order of the list for glibc 2.17.
+ * sysdeps/unix/sysv/linux/powerpc/powerpc64/nptl/libc.abilist:
+ Likewise.
+
+2012-10-31 Andreas Schwab <schwab@xxxxxxxxxxxxxx>
+
+ * sysdeps/powerpc/fpu/libm-test-ulps: Update.
+
+2012-10-31 Joseph Myers <joseph@xxxxxxxxxxxxxxxx>
+
+ [BZ #14610]
+ * sysdeps/ieee754/ldbl-128ibm/e_atan2l.c (__ieee754_atan2l): Check
+ for low part of x being zero before using __atanl (y).
+ * math/libm-test.inc (atan2_test): Add another test.
+
+ * manual/install.texi (Configuring and compiling): Document
+ general use of test-wrapper and test-wrapper-env.
+ * INSTALL: Regenerated.
+
+ * sysdeps/ieee754/dbl-64/s_fma.c: Include <tininess.h>.
+ (__fma): Do not extract and scale down low bits on after-rounding
+ systems when result rounded to normal precision would have normal
+ exponent.
+ * sysdeps/ieee754/ldbl-128/s_fmal.c: Include <tininess.h>.
+ (__fmal): Do not extract and scale down low bits on after-rounding
+ systems when result rounded to normal precision would have normal
+ exponent.
+ * sysdeps/ieee754/ldbl-96/s_fmal.c: Include <tininess.h>.
+ (__fmal): Do not extract and scale down low bits on after-rounding
+ systems when result rounded to normal precision would have normal
+ exponent.
+ * math/libm-test.inc (UNDERFLOW_EXCEPTION_BEFORE_ROUNDING): New
+ macro.
+ (fma_test): Add more tests.
+ (fma_test_towardzero): Likewise.
+ (fma_test_downward): Likewise.
+ (fma_test_upward): Likewise.
+
+2012-10-30 H.J. Lu <hongjiu.lu@xxxxxxxxx>
+
+ * sysdeps/i386/tininess.h: Renamed to ...
+ * sysdeps/x86/tininess.h: This.
+ * sysdeps/x86_64/tininess.h: Removed.
+
2012-10-30 Joseph Myers <joseph@xxxxxxxxxxxxxxxx>
* elf/Makefile ($(objpfx)tst-array1.out): Depend on comparison
Modified: fsf/trunk/libc/INSTALL
==============================================================================
--- fsf/trunk/libc/INSTALL (original)
+++ fsf/trunk/libc/INSTALL Thu Nov 1 00:01:46 2012
@@ -203,6 +203,17 @@
HOSTNAME is the host name of a system that can run the newly built
binaries of the GNU C Library. The source and build directories must
be visible at the same locations on both the build system and HOSTNAME.
+
+ In general, when testing the GNU C Library, `test-wrapper' may be set
+to the name and arguments of any program to run newly built binaries.
+This program must preserve the arguments to the binary being run, its
+working directory, all environment variables set as part of testing and
+the standard input, output and error file descriptors. If
+`TEST-WRAPPER env' will not work to run a program with environment
+variables set, then `test-wrapper-env' must be set to a program that
+runs a newly built program with environment variable assignments in
+effect, those assignments being specified as `VAR=VALUE' before the
+name of the program to be run.
Installing the C Library
========================
Modified: fsf/trunk/libc/NEWS
==============================================================================
--- fsf/trunk/libc/NEWS (original)
+++ fsf/trunk/libc/NEWS Thu Nov 1 00:01:46 2012
@@ -16,8 +16,8 @@
14303, 14307, 14328, 14331, 14336, 14337, 14347, 14349, 14376, 14417,
14459, 14476, 14477, 14505, 14510, 14516, 14518, 14519, 14530, 14532,
14538, 14543, 14544, 14545, 14557, 14562, 14568, 14576, 14579, 14583,
- 14587, 14595, 14602, 14621, 14638, 14645, 14648, 14652, 14660, 14661,
- 14683, 14694, 14716, 14743, 14767, 14783.
+ 14587, 14595, 14602, 14610, 14621, 14638, 14645, 14648, 14652, 14660,
+ 14661, 14683, 14694, 14716, 14743, 14767, 14783.
* Support for STT_GNU_IFUNC symbols added for s390 and s390x.
Optimized versions of memcpy, memset, and memcmp added for System z10 and
Modified: fsf/trunk/libc/manual/install.texi
==============================================================================
--- fsf/trunk/libc/manual/install.texi (original)
+++ fsf/trunk/libc/manual/install.texi Thu Nov 1 00:01:46 2012
@@ -233,6 +233,17 @@
directories must be visible at the same locations on both the build
system and @var{hostname}.
+In general, when testing @theglibc{}, @samp{test-wrapper} may be set
+to the name and arguments of any program to run newly built binaries.
+This program must preserve the arguments to the binary being run, its
+working directory, all environment variables set as part of testing
+and the standard input, output and error file descriptors. If
+@samp{@var{test-wrapper} env} will not work to run a program with
+environment variables set, then @samp{test-wrapper-env} must be set to
+a program that runs a newly built program with environment variable
+assignments in effect, those assignments being specified as
+@samp{@var{var}=@var{value}} before the name of the program to be run.
+
@node Running make install
@appendixsec Installing the C Library
Modified: fsf/trunk/libc/math/libm-test.inc
==============================================================================
--- fsf/trunk/libc/math/libm-test.inc (original)
+++ fsf/trunk/libc/math/libm-test.inc Thu Nov 1 00:01:46 2012
@@ -132,6 +132,7 @@
#include <stdio.h>
#include <string.h>
#include <argp.h>
+#include <tininess.h>
/* Allow platforms without all rounding modes to test properly,
assuming they provide an __FE_UNDEFINED in <bits/fenv.h> which
@@ -187,6 +188,11 @@
#else
# define UNDERFLOW_EXCEPTION_LDOUBLE_IBM 0
#endif
+/* Values underflowing on architectures detecting tininess before
+ rounding, but not on those detecting tininess after rounding. */
+#define UNDERFLOW_EXCEPTION_BEFORE_ROUNDING (TININESS_AFTER_ROUNDING \
+ ? 0 \
+ : UNDERFLOW_EXCEPTION)
/* Various constants (we must supply them precalculated for accuracy). */
#define M_PI_6l .52359877559829887307710723054658383L
@@ -1291,6 +1297,9 @@
TEST_ff_f (atan2, 1.390625L, 0.9296875L, 0.981498387184244311516296577615519772L);
TEST_ff_f (atan2, -0.00756827042671106339L, -.001792735857538728036L, -1.80338464113663849327153994379639112L);
+#if defined TEST_LDOUBLE && LDBL_MANT_DIG >= 64
+ TEST_ff_f (atan2, 0x1.00000000000001p0L, 0x1.00000000000001p0L, M_PI_4l);
+#endif
END (atan2);
}
@@ -4618,6 +4627,12 @@
TEST_fff_f (fma, 0x1.fffffep+127, 2.0, -0x1.fffffep+127, 0x1.fffffep+127);
TEST_fff_f (fma, 0x1.4p-126, 0x1.000004p-1, 0x1p-128, 0x1.c00004p-127, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, -0x1.4p-126, 0x1.000004p-1, -0x1p-128, -0x1.c00004p-127, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1.fffff8p-126, 0x1.000002p-1, 0x1p-149, 0x1p-126, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, -0x1.fffff8p-126, 0x1.000002p-1, -0x1p-149, -0x1p-126, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, 0x1p-149, 0x1p-1, 0x0.fffffep-126, 0x1p-126, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-149, 0x1p-1, -0x0.fffffep-126, -0x1p-126, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-149, 0x1.1p-1, 0x0.fffffep-126, 0x1p-126, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-149, 0x1.1p-1, -0x0.fffffep-126, -0x1p-126, UNDERFLOW_EXCEPTION);
#endif
#if defined (TEST_DOUBLE) && DBL_MANT_DIG == 53
TEST_fff_f (fma, 0x1.7fp+13, 0x1.0000000000001p+0, 0x1.ffep-48, 0x1.7f00000000001p+13);
@@ -4642,6 +4657,12 @@
TEST_fff_f (fma, -0x1.fffffffffffffp-711, 0x1.fffffffffffffp-275, 0x1.fffffe00007ffp-983, 0x1.7ffffe00007ffp-983);
TEST_fff_f (fma, 0x1.4p-1022, 0x1.0000000000002p-1, 0x1p-1024, 0x1.c000000000002p-1023, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, -0x1.4p-1022, 0x1.0000000000002p-1, -0x1p-1024, -0x1.c000000000002p-1023, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1.ffffffffffffcp-1022, 0x1.0000000000001p-1, 0x1p-1074, 0x1p-1022, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, -0x1.ffffffffffffcp-1022, 0x1.0000000000001p-1, -0x1p-1074, -0x1p-1022, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, 0x1p-1074, 0x1p-1, 0x0.fffffffffffffp-1022, 0x1p-1022, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-1074, 0x1p-1, -0x0.fffffffffffffp-1022, -0x1p-1022, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-1074, 0x1.1p-1, 0x0.fffffffffffffp-1022, 0x1p-1022, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-1074, 0x1.1p-1, -0x0.fffffffffffffp-1022, -0x1p-1022, UNDERFLOW_EXCEPTION);
#endif
#if defined (TEST_LDOUBLE) && LDBL_MANT_DIG == 64
TEST_fff_f (fma, -0x8.03fcp+3696L, 0xf.fffffffffffffffp-6140L, 0x8.3ffffffffffffffp-2450L, -0x8.01ecp-2440L);
@@ -4652,6 +4673,12 @@
TEST_fff_f (fma, 0xb.ffffp-4777L, 0x8.000000fffffffffp-11612L, -0x0.3800fff8p-16385L, 0x5.c7fe80c7ffeffffp-16385L, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, 0x1.4p-16382L, 0x1.0000000000000004p-1L, 0x1p-16384L, 0x1.c000000000000004p-16383L, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, -0x1.4p-16382L, 0x1.0000000000000004p-1L, -0x1p-16384L, -0x1.c000000000000004p-16383L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1.fffffffffffffff8p-16382L, 0x1.0000000000000002p-1L, 0x1p-16445L, 0x1p-16382L, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, -0x1.fffffffffffffff8p-16382L, 0x1.0000000000000002p-1L, -0x1p-16445L, -0x1p-16382L, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, 0x1p-16445L, 0x1p-1L, 0x0.fffffffffffffffep-16382L, 0x1p-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-16445L, 0x1p-1L, -0x0.fffffffffffffffep-16382L, -0x1p-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-16445L, 0x1.1p-1L, 0x0.fffffffffffffffep-16382L, 0x1p-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-16445L, 0x1.1p-1L, -0x0.fffffffffffffffep-16382L, -0x1p-16382L, UNDERFLOW_EXCEPTION);
#endif
#if defined (TEST_LDOUBLE) && LDBL_MANT_DIG == 113
TEST_fff_f (fma, 0x1.bb2de33e02ccbbfa6e245a7c1f71p-2584L, -0x1.6b500daf0580d987f1bc0cadfcddp-13777L, 0x1.613cd91d9fed34b33820e5ab9d8dp-16378L, -0x1.3a79fb50eb9ce887cffa0f09bd9fp-16360L);
@@ -4669,6 +4696,12 @@
TEST_fff_f (fma, 0x1.801181509c03bdbef10d6165588cp-15131L, 0x1.ad86f8e57d3d40bfa8007780af63p-368L, -0x1.6e9df0dab1c9f1d7a6043c390741p-15507L, 0x1.417c9b2b15e2ad57dc9e0e920844p-15498L);
TEST_fff_f (fma, 0x1.4p-16382L, 0x1.0000000000000000000000000002p-1L, 0x1p-16384L, 0x1.c000000000000000000000000002p-16383L, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, -0x1.4p-16382L, 0x1.0000000000000000000000000002p-1L, -0x1p-16384L, -0x1.c000000000000000000000000002p-16383L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1.fffffffffffffffffffffffffffcp-16382L, 0x1.0000000000000000000000000001p-1L, 0x1p-16494L, 0x1p-16382L, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, -0x1.fffffffffffffffffffffffffffcp-16382L, 0x1.0000000000000000000000000001p-1L, -0x1p-16494L, -0x1p-16382L, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, 0x1p-16494L, 0x1p-1L, 0x0.ffffffffffffffffffffffffffffp-16382L, 0x1p-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-16494L, 0x1p-1L, -0x0.ffffffffffffffffffffffffffffp-16382L, -0x1p-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-16494L, 0x1.1p-1L, 0x0.ffffffffffffffffffffffffffffp-16382L, 0x1p-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-16494L, 0x1.1p-1L, -0x0.ffffffffffffffffffffffffffffp-16382L, -0x1p-16382L, UNDERFLOW_EXCEPTION);
#endif
END (fma);
@@ -4727,18 +4760,42 @@
#if defined (TEST_FLOAT) && FLT_MANT_DIG == 24
TEST_fff_f (fma, 0x1.4p-126, 0x1.000004p-1, 0x1p-128, 0x1.c00004p-127, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, -0x1.4p-126, 0x1.000004p-1, -0x1p-128, -0x1.c00004p-127, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1.fffff8p-126, 0x1.000002p-1, 0x1p-149, 0x0.fffffep-126, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1.fffff8p-126, 0x1.000002p-1, -0x1p-149, -0x0.fffffep-126, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-149, 0x1p-1, 0x0.fffffep-126, 0x0.fffffep-126, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-149, 0x1p-1, -0x0.fffffep-126, -0x0.fffffep-126, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-149, 0x1.1p-1, 0x0.fffffep-126, 0x0.fffffep-126, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-149, 0x1.1p-1, -0x0.fffffep-126, -0x0.fffffep-126, UNDERFLOW_EXCEPTION);
#endif
#if defined (TEST_DOUBLE) && DBL_MANT_DIG == 53
TEST_fff_f (fma, 0x1.4p-1022, 0x1.0000000000002p-1, 0x1p-1024, 0x1.c000000000002p-1023, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, -0x1.4p-1022, 0x1.0000000000002p-1, -0x1p-1024, -0x1.c000000000002p-1023, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1.ffffffffffffcp-1022, 0x1.0000000000001p-1, 0x1p-1074, 0x0.fffffffffffffp-1022, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1.ffffffffffffcp-1022, 0x1.0000000000001p-1, -0x1p-1074, -0x0.fffffffffffffp-1022, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-1074, 0x1p-1, 0x0.fffffffffffffp-1022, 0x0.fffffffffffffp-1022, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-1074, 0x1p-1, -0x0.fffffffffffffp-1022, -0x0.fffffffffffffp-1022, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-1074, 0x1.1p-1, 0x0.fffffffffffffp-1022, 0x0.fffffffffffffp-1022, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-1074, 0x1.1p-1, -0x0.fffffffffffffp-1022, -0x0.fffffffffffffp-1022, UNDERFLOW_EXCEPTION);
#endif
#if defined (TEST_LDOUBLE) && LDBL_MANT_DIG == 64
TEST_fff_f (fma, 0x1.4p-16382L, 0x1.0000000000000004p-1L, 0x1p-16384L, 0x1.c000000000000004p-16383L, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, -0x1.4p-16382L, 0x1.0000000000000004p-1L, -0x1p-16384L, -0x1.c000000000000004p-16383L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1.fffffffffffffff8p-16382L, 0x1.0000000000000002p-1L, 0x1p-16445L, 0x0.fffffffffffffffep-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1.fffffffffffffff8p-16382L, 0x1.0000000000000002p-1L, -0x1p-16445L, -0x0.fffffffffffffffep-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-16445L, 0x1p-1L, 0x0.fffffffffffffffep-16382L, 0x0.fffffffffffffffep-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-16445L, 0x1p-1L, -0x0.fffffffffffffffep-16382L, -0x0.fffffffffffffffep-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-16445L, 0x1.1p-1L, 0x0.fffffffffffffffep-16382L, 0x0.fffffffffffffffep-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-16445L, 0x1.1p-1L, -0x0.fffffffffffffffep-16382L, -0x0.fffffffffffffffep-16382L, UNDERFLOW_EXCEPTION);
#endif
#if defined (TEST_LDOUBLE) && LDBL_MANT_DIG == 113
TEST_fff_f (fma, 0x1.4p-16382L, 0x1.0000000000000000000000000002p-1L, 0x1p-16384L, 0x1.c000000000000000000000000002p-16383L, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, -0x1.4p-16382L, 0x1.0000000000000000000000000002p-1L, -0x1p-16384L, -0x1.c000000000000000000000000002p-16383L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1.fffffffffffffffffffffffffffcp-16382L, 0x1.0000000000000000000000000001p-1L, 0x1p-16494L, 0x0.ffffffffffffffffffffffffffffp-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1.fffffffffffffffffffffffffffcp-16382L, 0x1.0000000000000000000000000001p-1L, -0x1p-16494L, -0x0.ffffffffffffffffffffffffffffp-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-16494L, 0x1p-1L, 0x0.ffffffffffffffffffffffffffffp-16382L, 0x0.ffffffffffffffffffffffffffffp-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-16494L, 0x1p-1L, -0x0.ffffffffffffffffffffffffffffp-16382L, -0x0.ffffffffffffffffffffffffffffp-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-16494L, 0x1.1p-1L, 0x0.ffffffffffffffffffffffffffffp-16382L, 0x0.ffffffffffffffffffffffffffffp-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-16494L, 0x1.1p-1L, -0x0.ffffffffffffffffffffffffffffp-16382L, -0x0.ffffffffffffffffffffffffffffp-16382L, UNDERFLOW_EXCEPTION);
#endif
}
@@ -4800,18 +4857,42 @@
#if defined (TEST_FLOAT) && FLT_MANT_DIG == 24
TEST_fff_f (fma, 0x1.4p-126, 0x1.000004p-1, 0x1p-128, 0x1.c00004p-127, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, -0x1.4p-126, 0x1.000004p-1, -0x1p-128, -0x1.c00008p-127, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1.fffff8p-126, 0x1.000002p-1, 0x1p-149, 0x0.fffffep-126, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1.fffff8p-126, 0x1.000002p-1, -0x1p-149, -0x1p-126, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, 0x1p-149, 0x1p-1, 0x0.fffffep-126, 0x0.fffffep-126, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-149, 0x1p-1, -0x0.fffffep-126, -0x1p-126, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-149, 0x1.1p-1, 0x0.fffffep-126, 0x0.fffffep-126, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-149, 0x1.1p-1, -0x0.fffffep-126, -0x1p-126, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
#endif
#if defined (TEST_DOUBLE) && DBL_MANT_DIG == 53
TEST_fff_f (fma, 0x1.4p-1022, 0x1.0000000000002p-1, 0x1p-1024, 0x1.c000000000002p-1023, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, -0x1.4p-1022, 0x1.0000000000002p-1, -0x1p-1024, -0x1.c000000000004p-1023, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1.ffffffffffffcp-1022, 0x1.0000000000001p-1, 0x1p-1074, 0x0.fffffffffffffp-1022, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1.ffffffffffffcp-1022, 0x1.0000000000001p-1, -0x1p-1074, -0x1p-1022, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, 0x1p-1074, 0x1p-1, 0x0.fffffffffffffp-1022, 0x0.fffffffffffffp-1022, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-1074, 0x1p-1, -0x0.fffffffffffffp-1022, -0x1p-1022, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-1074, 0x1.1p-1, 0x0.fffffffffffffp-1022, 0x0.fffffffffffffp-1022, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-1074, 0x1.1p-1, -0x0.fffffffffffffp-1022, -0x1p-1022, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
#endif
#if defined (TEST_LDOUBLE) && LDBL_MANT_DIG == 64
TEST_fff_f (fma, 0x1.4p-16382L, 0x1.0000000000000004p-1L, 0x1p-16384L, 0x1.c000000000000004p-16383L, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, -0x1.4p-16382L, 0x1.0000000000000004p-1L, -0x1p-16384L, -0x1.c000000000000008p-16383L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1.fffffffffffffff8p-16382L, 0x1.0000000000000002p-1L, 0x1p-16445L, 0x0.fffffffffffffffep-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1.fffffffffffffff8p-16382L, 0x1.0000000000000002p-1L, -0x1p-16445L, -0x1p-16382L, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, 0x1p-16445L, 0x1p-1L, 0x0.fffffffffffffffep-16382L, 0x0.fffffffffffffffep-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-16445L, 0x1p-1L, -0x0.fffffffffffffffep-16382L, -0x1p-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-16445L, 0x1.1p-1L, 0x0.fffffffffffffffep-16382L, 0x0.fffffffffffffffep-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-16445L, 0x1.1p-1L, -0x0.fffffffffffffffep-16382L, -0x1p-16382L, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
#endif
#if defined (TEST_LDOUBLE) && LDBL_MANT_DIG == 113
TEST_fff_f (fma, 0x1.4p-16382L, 0x1.0000000000000000000000000002p-1L, 0x1p-16384L, 0x1.c000000000000000000000000002p-16383L, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, -0x1.4p-16382L, 0x1.0000000000000000000000000002p-1L, -0x1p-16384L, -0x1.c000000000000000000000000004p-16383L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1.fffffffffffffffffffffffffffcp-16382L, 0x1.0000000000000000000000000001p-1L, 0x1p-16494L, 0x0.ffffffffffffffffffffffffffffp-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1.fffffffffffffffffffffffffffcp-16382L, 0x1.0000000000000000000000000001p-1L, -0x1p-16494L, -0x1p-16382L, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, 0x1p-16494L, 0x1p-1L, 0x0.ffffffffffffffffffffffffffffp-16382L, 0x0.ffffffffffffffffffffffffffffp-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-16494L, 0x1p-1L, -0x0.ffffffffffffffffffffffffffffp-16382L, -0x1p-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-16494L, 0x1.1p-1L, 0x0.ffffffffffffffffffffffffffffp-16382L, 0x0.ffffffffffffffffffffffffffffp-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-16494L, 0x1.1p-1L, -0x0.ffffffffffffffffffffffffffffp-16382L, -0x1p-16382L, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
#endif
}
@@ -4873,18 +4954,42 @@
#if defined (TEST_FLOAT) && FLT_MANT_DIG == 24
TEST_fff_f (fma, 0x1.4p-126, 0x1.000004p-1, 0x1p-128, 0x1.c00008p-127, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, -0x1.4p-126, 0x1.000004p-1, -0x1p-128, -0x1.c00004p-127, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1.fffff8p-126, 0x1.000002p-1, 0x1p-149, 0x1p-126, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, -0x1.fffff8p-126, 0x1.000002p-1, -0x1p-149, -0x0.fffffep-126, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-149, 0x1p-1, 0x0.fffffep-126, 0x1p-126, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-149, 0x1p-1, -0x0.fffffep-126, -0x0.fffffep-126, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-149, 0x1.1p-1, 0x0.fffffep-126, 0x1p-126, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, -0x1p-149, 0x1.1p-1, -0x0.fffffep-126, -0x0.fffffep-126, UNDERFLOW_EXCEPTION);
#endif
#if defined (TEST_DOUBLE) && DBL_MANT_DIG == 53
TEST_fff_f (fma, 0x1.4p-1022, 0x1.0000000000002p-1, 0x1p-1024, 0x1.c000000000004p-1023, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, -0x1.4p-1022, 0x1.0000000000002p-1, -0x1p-1024, -0x1.c000000000002p-1023, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1.ffffffffffffcp-1022, 0x1.0000000000001p-1, 0x1p-1074, 0x1p-1022, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, -0x1.ffffffffffffcp-1022, 0x1.0000000000001p-1, -0x1p-1074, -0x0.fffffffffffffp-1022, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-1074, 0x1p-1, 0x0.fffffffffffffp-1022, 0x1p-1022, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-1074, 0x1p-1, -0x0.fffffffffffffp-1022, -0x0.fffffffffffffp-1022, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-1074, 0x1.1p-1, 0x0.fffffffffffffp-1022, 0x1p-1022, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, -0x1p-1074, 0x1.1p-1, -0x0.fffffffffffffp-1022, -0x0.fffffffffffffp-1022, UNDERFLOW_EXCEPTION);
#endif
#if defined (TEST_LDOUBLE) && LDBL_MANT_DIG == 64
TEST_fff_f (fma, 0x1.4p-16382L, 0x1.0000000000000004p-1L, 0x1p-16384L, 0x1.c000000000000008p-16383L, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, -0x1.4p-16382L, 0x1.0000000000000004p-1L, -0x1p-16384L, -0x1.c000000000000004p-16383L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1.fffffffffffffff8p-16382L, 0x1.0000000000000002p-1L, 0x1p-16445L, 0x1p-16382L, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, -0x1.fffffffffffffff8p-16382L, 0x1.0000000000000002p-1L, -0x1p-16445L, -0x0.fffffffffffffffep-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-16445L, 0x1p-1L, 0x0.fffffffffffffffep-16382L, 0x1p-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-16445L, 0x1p-1L, -0x0.fffffffffffffffep-16382L, -0x0.fffffffffffffffep-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-16445L, 0x1.1p-1L, 0x0.fffffffffffffffep-16382L, 0x1p-16382L, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, -0x1p-16445L, 0x1.1p-1L, -0x0.fffffffffffffffep-16382L, -0x0.fffffffffffffffep-16382L, UNDERFLOW_EXCEPTION);
#endif
#if defined (TEST_LDOUBLE) && LDBL_MANT_DIG == 113
TEST_fff_f (fma, 0x1.4p-16382L, 0x1.0000000000000000000000000002p-1L, 0x1p-16384L, 0x1.c000000000000000000000000004p-16383L, UNDERFLOW_EXCEPTION);
TEST_fff_f (fma, -0x1.4p-16382L, 0x1.0000000000000000000000000002p-1L, -0x1p-16384L, -0x1.c000000000000000000000000002p-16383L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1.fffffffffffffffffffffffffffcp-16382L, 0x1.0000000000000000000000000001p-1L, 0x1p-16494L, 0x1p-16382L, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, -0x1.fffffffffffffffffffffffffffcp-16382L, 0x1.0000000000000000000000000001p-1L, -0x1p-16494L, -0x0.ffffffffffffffffffffffffffffp-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-16494L, 0x1p-1L, 0x0.ffffffffffffffffffffffffffffp-16382L, 0x1p-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, -0x1p-16494L, 0x1p-1L, -0x0.ffffffffffffffffffffffffffffp-16382L, -0x0.ffffffffffffffffffffffffffffp-16382L, UNDERFLOW_EXCEPTION);
+ TEST_fff_f (fma, 0x1p-16494L, 0x1.1p-1L, 0x0.ffffffffffffffffffffffffffffp-16382L, 0x1p-16382L, UNDERFLOW_EXCEPTION_BEFORE_ROUNDING);
+ TEST_fff_f (fma, -0x1p-16494L, 0x1.1p-1L, -0x0.ffffffffffffffffffffffffffffp-16382L, -0x0.ffffffffffffffffffffffffffffp-16382L, UNDERFLOW_EXCEPTION);
#endif
}
Modified: fsf/trunk/libc/ports/ChangeLog.mips
==============================================================================
--- fsf/trunk/libc/ports/ChangeLog.mips (original)
+++ fsf/trunk/libc/ports/ChangeLog.mips Thu Nov 1 00:01:46 2012
@@ -1,3 +1,9 @@
+2012-10-31 Steve Ellcey <sellcey@xxxxxxxx>
+
+ * sysdeps/mips/memcpy.S: Add prefetching and more unrolling, make
+ it work in 32 or 64 bit modes.
+ * sysdeps/mips/mips64/memcpy.S: Remove.
+
2012-10-30 Joseph Myers <joseph@xxxxxxxxxxxxxxxx>
[BZ #14047]
Modified: fsf/trunk/libc/ports/ChangeLog.powerpc
==============================================================================
--- fsf/trunk/libc/ports/ChangeLog.powerpc (original)
+++ fsf/trunk/libc/ports/ChangeLog.powerpc Thu Nov 1 00:01:46 2012
@@ -1,4 +1,9 @@
-2012-09-25 Jason Gunthorpe <jgunthorpe@xxxxxxxxxxxxxxxxxxxx>
+2012-10-31 Andreas Schwab <schwab@xxxxxxxxxxxxxx>
+
+ * sysdeps/unix/sysv/linux/powerpc/powerpc32/nofpu/nptl/libc.abilist:
+ Fix sort order.
+
+2012-10-30 Jason Gunthorpe <jgunthorpe@xxxxxxxxxxxxxxxxxxxx>
Ryan S. Arnold <rsa@xxxxxxxxxxxxxxxxxx>
[BZ #14595]
Modified: fsf/trunk/libc/ports/sysdeps/mips/memcpy.S
==============================================================================
--- fsf/trunk/libc/ports/sysdeps/mips/memcpy.S (original)
+++ fsf/trunk/libc/ports/sysdeps/mips/memcpy.S Thu Nov 1 00:01:46 2012
@@ -1,6 +1,5 @@
-/* Copyright (C) 2002-2012 Free Software Foundation, Inc.
+/* Copyright (C) 2012 Free Software Foundation, Inc.
This file is part of the GNU C Library.
- Contributed by Hartvig Ekner <hartvige@xxxxxxxx>, 2002.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
@@ -16,119 +15,616 @@
License along with the GNU C Library. If not, see
<http://www.gnu.org/licenses/>. */
+#ifdef ANDROID_CHANGES
+#include "machine/asm.h"
+#include "machine/regdef.h"
+#define USE_MEMMOVE_FOR_OVERLAP
+#define PREFETCH_LOAD_HINT PREFETCH_HINT_LOAD_STREAMED
+#define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
+#elif _LIBC
#include <sysdep.h>
-
-
-/* void *memcpy(void *s1, const void *s2, size_t n); */
-
+#include <regdef.h>
+#include <sys/asm.h>
+#define PREFETCH_LOAD_HINT PREFETCH_HINT_LOAD_STREAMED
+#define PREFETCH_STORE_HINT PREFETCH_HINT_STORE_STREAMED
+#elif _COMPILING_NEWLIB
+#include "machine/asm.h"
+#include "machine/regdef.h"
+#define PREFETCH_LOAD_HINT PREFETCH_HINT_LOAD_STREAMED
+#define PREFETCH_STORE_HINT PREFETCH_HINT_STORE_STREAMED
+#else
+#include <regdef.h>
+#include <sys/asm.h>
+#endif
+
+#if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
+ (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
+#ifndef DISABLE_PREFETCH
+#define USE_PREFETCH
+#endif
+#endif
+
+#if (_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32)
+#ifndef DISABLE_DOUBLE
+#define USE_DOUBLE
+#endif
+#endif
+
+
+
+/* Some asm.h files do not have the L macro definition. */
+#ifndef L
+#if _MIPS_SIM == _ABIO32
+# define L(label) $L ## label
+#else
+# define L(label) .L ## label
+#endif
+#endif
+
+/* Some asm.h files do not have the PTR_ADDIU macro definition. */
+#ifndef PTR_ADDIU
+#ifdef USE_DOUBLE
+#define PTR_ADDIU daddiu
+#else
+#define PTR_ADDIU addiu
+#endif
+#endif
+
+/* Some asm.h files do not have the PTR_SRA macro definition. */
+#ifndef PTR_SRA
+#ifdef USE_DOUBLE
+#define PTR_SRA dsra
+#else
+#define PTR_SRA sra
+#endif
+#endif
+
+
+/*
+ * Using PREFETCH_HINT_LOAD_STREAMED instead of PREFETCH_LOAD on load
+ * prefetches appears to offer a slight preformance advantage.
+ *
+ * Using PREFETCH_HINT_PREPAREFORSTORE instead of PREFETCH_STORE
+ * or PREFETCH_STORE_STREAMED offers a large performance advantage
+ * but PREPAREFORSTORE has some special restrictions to consider.
+ *
+ * Prefetch with the 'prepare for store' hint does not copy a memory
+ * location into the cache, it just allocates a cache line and zeros
+ * it out. This means that if you do not write to the entire cache
+ * line before writing it out to memory some data will get zero'ed out
+ * when the cache line is written back to memory and data will be lost.
+ *
+ * Also if you are using this memcpy to copy overlapping buffers it may
+ * not behave correctly when using the 'prepare for store' hint. If you
+ * use the 'prepare for store' prefetch on a memory area that is in the
+ * memcpy source (as well as the memcpy destination), then you will get
+ * some data zero'ed out before you have a chance to read it and data will
+ * be lost.
+ *
+ * If you are going to use this memcpy routine with the 'prepare for store'
+ * prefetch you may want to set USE_MEMMOVE_FOR_OVERLAP in order to avoid
+ * the problem of running memcpy on overlapping buffers.
+ *
+ * There are ifdef'ed sections of this memcpy to make sure that it does not
+ * do prefetches on cache lines that are not going to be completely written.
+ * This code is only needed and only used when PREFETCH_STORE_HINT is set to
+ * PREFETCH_HINT_PREPAREFORSTORE. This code assumes that cache lines are
+ * 32 bytes and if the cache line is larger it will not work correctly.
+ */
+
+#ifdef USE_PREFETCH
+# define PREFETCH_HINT_LOAD 0
+# define PREFETCH_HINT_STORE 1
+# define PREFETCH_HINT_LOAD_STREAMED 4
+# define PREFETCH_HINT_STORE_STREAMED 5
+# define PREFETCH_HINT_LOAD_RETAINED 6
+# define PREFETCH_HINT_STORE_RETAINED 7
+# define PREFETCH_HINT_WRITEBACK_INVAL 25
+# define PREFETCH_HINT_PREPAREFORSTORE 30
+
+/*
+ * If we have not picked out what hints to use at this point use the
+ * standard load and store prefetch hints.
+ */
+#ifndef PREFETCH_STORE_HINT
+# define PREFETCH_STORE_HINT PREFETCH_HINT_STORE
+#endif
+#ifndef PREFETCH_LOAD_HINT
+# define PREFETCH_LOAD_HINT PREFETCH_HINT_LOAD
+#endif
+
+/*
+ * We double everything when USE_DOUBLE is true so we do 2 prefetches to
+ * get 64 bytes in that case. The assumption is that each individual
+ * prefetch brings in 32 bytes.
+ */
+#ifdef USE_DOUBLE
+# define PREFETCH_CHUNK 64
+# define PREFETCH_FOR_LOAD(chunk, reg) \
+ pref PREFETCH_LOAD_HINT, (chunk)*32(reg); \
+ pref PREFETCH_LOAD_HINT, ((chunk)+1)*32(reg)
+# define PREFETCH_FOR_STORE(chunk, reg) \
+ pref PREFETCH_STORE_HINT, (chunk)*32(reg); \
+ pref PREFETCH_STORE_HINT, ((chunk)+1)*32(reg)
+#else
+# define PREFETCH_CHUNK 32
+# define PREFETCH_FOR_LOAD(chunk, reg) \
+ pref PREFETCH_LOAD_HINT, (chunk)*32(reg)
+# define PREFETCH_FOR_STORE(chunk, reg) \
+ pref PREFETCH_STORE_HINT, (chunk)*32(reg)
+#endif
+# define PREFETCH_LIMIT (5 * PREFETCH_CHUNK)
+#else /* USE_PREFETCH not defined */
+# define PREFETCH_FOR_LOAD(offset, reg)
+# define PREFETCH_FOR_STORE(offset, reg)
+#endif
+
+/* Allow the routine to be named something else if desired. */
+#ifndef MEMCPY_NAME
+#define MEMCPY_NAME memcpy
+#endif
+
+/* We use these 32/64 bit registers as temporaries to do the copying. */
+#define REG0 t0
+#define REG1 t1
+#define REG2 t2
+#define REG3 t3
+#if _MIPS_SIM == _ABIO32
+# define REG4 t4
+# define REG5 t5
+# define REG6 t6
+# define REG7 t7
+#else
+# define REG4 ta0
+# define REG5 ta1
+# define REG6 ta2
+# define REG7 ta3
+#endif
+
+/* We load/store 64 bits at a time when USE_DOUBLE is true.
+ * The C_ prefix stands for CHUNK and is used to avoid macro name
+ * conflicts with system header files. */
+
+#ifdef USE_DOUBLE
+# define C_ST sd
+# define C_LD ld
#if __MIPSEB
-# define LWHI lwl /* high part is left in big-endian */
-# define SWHI swl /* high part is left in big-endian */
-# define LWLO lwr /* low part is right in big-endian */
-# define SWLO swr /* low part is right in big-endian */
-#else
-# define LWHI lwr /* high part is right in little-endian */
-# define SWHI swr /* high part is right in little-endian */
-# define LWLO lwl /* low part is left in little-endian */
-# define SWLO swl /* low part is left in little-endian */
-#endif
-
-ENTRY (memcpy)
+# define C_LDHI ldl /* high part is left in big-endian */
+# define C_STHI sdl /* high part is left in big-endian */
+# define C_LDLO ldr /* low part is right in big-endian */
+# define C_STLO sdr /* low part is right in big-endian */
+#else
+# define C_LDHI ldr /* high part is right in little-endian */
+# define C_STHI sdr /* high part is right in little-endian */
+# define C_LDLO ldl /* low part is left in little-endian */
+# define C_STLO sdl /* low part is left in little-endian */
+#endif
+#else
+# define C_ST sw
+# define C_LD lw
+#if __MIPSEB
+# define C_LDHI lwl /* high part is left in big-endian */
+# define C_STHI swl /* high part is left in big-endian */
+# define C_LDLO lwr /* low part is right in big-endian */
+# define C_STLO swr /* low part is right in big-endian */
+#else
+# define C_LDHI lwr /* high part is right in little-endian */
+# define C_STHI swr /* high part is right in little-endian */
+# define C_LDLO lwl /* low part is left in little-endian */
+# define C_STLO swl /* low part is left in little-endian */
+#endif
+#endif
+
+/* Bookkeeping values for 32 vs. 64 bit mode. */
+#ifdef USE_DOUBLE
+# define NSIZE 8
+# define NSIZEMASK 0x3f
+# define NSIZEDMASK 0x7f
+#else
+# define NSIZE 4
+# define NSIZEMASK 0x1f
+# define NSIZEDMASK 0x3f
+#endif
+#define UNIT(unit) ((unit)*NSIZE)
+#define UNITM1(unit) (((unit)*NSIZE)-1)
+
+#ifdef ANDROID_CHANGES
+LEAF(MEMCPY_NAME, 0)
+#else
+LEAF(MEMCPY_NAME)
+#endif
+ .set nomips16
.set noreorder
-
- slti t0, a2, 8 # Less than 8?
- bne t0, zero, L(last8)
- move v0, a0 # Setup exit value before too late
-
- xor t0, a1, a0 # Find a0/a1 displacement
- andi t0, 0x3
- bne t0, zero, L(shift) # Go handle the unaligned case
- subu t1, zero, a1
- andi t1, 0x3 # a0/a1 are aligned, but are we
- beq t1, zero, L(chk8w) # starting in the middle of a word?
- subu a2, t1
- LWHI t0, 0(a1) # Yes we are... take care of that
- addu a1, t1
- SWHI t0, 0(a0)
- addu a0, t1
-
-L(chk8w):
- andi t0, a2, 0x1f # 32 or more bytes left?
- beq t0, a2, L(chk1w)
- subu a3, a2, t0 # Yes
- addu a3, a1 # a3 = end address of loop
- move a2, t0 # a2 = what will be left after loop
-L(lop8w):
- lw t0, 0(a1) # Loop taking 8 words at a time
- lw t1, 4(a1)
- lw t2, 8(a1)
- lw t3, 12(a1)
- lw t4, 16(a1)
- lw t5, 20(a1)
- lw t6, 24(a1)
- lw t7, 28(a1)
- addiu a0, 32
- addiu a1, 32
- sw t0, -32(a0)
- sw t1, -28(a0)
- sw t2, -24(a0)
- sw t3, -20(a0)
- sw t4, -16(a0)
- sw t5, -12(a0)
- sw t6, -8(a0)
- bne a1, a3, L(lop8w)
- sw t7, -4(a0)
-
-L(chk1w):
- andi t0, a2, 0x3 # 4 or more bytes left?
- beq t0, a2, L(last8)
- subu a3, a2, t0 # Yes, handle them one word at a time
- addu a3, a1 # a3 again end address
- move a2, t0
-L(lop1w):
- lw t0, 0(a1)
- addiu a0, 4
- addiu a1, 4
- bne a1, a3, L(lop1w)
- sw t0, -4(a0)
-
-L(last8):
- blez a2, L(lst8e) # Handle last 8 bytes, one at a time
- addu a3, a2, a1
-L(lst8l):
- lb t0, 0(a1)
- addiu a0, 1
- addiu a1, 1
- bne a1, a3, L(lst8l)
- sb t0, -1(a0)
-L(lst8e):
- jr ra # Bye, bye
+/*
+ * Below we handle the case where memcpy is called with overlapping src and dst.
+ * Although memcpy is not required to handle this case, some parts of Android
+ * like Skia rely on such usage. We call memmove to handle such cases.
+ */
+#ifdef USE_MEMMOVE_FOR_OVERLAP
+ PTR_SUBU t0,a0,a1
+ PTR_SRA t2,t0,31
+ xor t1,t0,t2
+ PTR_SUBU t0,t1,t2
+ sltu t2,t0,a2
+ beq t2,zero,L(memcpy)
+ la t9,memmove
+ jr t9
+ nop
+L(memcpy):
+#endif
+/*
+ * If the size is less then 2*NSIZE (8 or 16), go to L(lastb). Regardless of
+ * size, copy dst pointer to v0 for the return value.
+ */
+ slti t2,a2,(2 * NSIZE)
+ bne t2,zero,L(lastb)
+ move v0,a0
+/*
+ * If src and dst have different alignments, go to L(unaligned), if they
+ * have the same alignment (but are not actually aligned) do a partial
+ * load/store to make them aligned. If they are both already aligned
+ * we can start copying at L(aligned).
+ */
+ xor t8,a1,a0
+ andi t8,t8,(NSIZE-1) /* t8 is a0/a1 word-displacement */
+ bne t8,zero,L(unaligned)
+ PTR_SUBU a3, zero, a0
+
+ andi a3,a3,(NSIZE-1) /* copy a3 bytes to align a0/a1 */
+ beq a3,zero,L(aligned) /* if a3=0, it is already aligned */
+ PTR_SUBU a2,a2,a3 /* a2 is the remining bytes count */
+
+ C_LDHI t8,0(a1)
+ PTR_ADDU a1,a1,a3
+ C_STHI t8,0(a0)
+ PTR_ADDU a0,a0,a3
+
+/*
+ * Now dst/src are both aligned to (word or double word) aligned addresses
+ * Set a2 to count how many bytes we have to copy after all the 64/128 byte
+ * chunks are copied and a3 to the dst pointer after all the 64/128 byte
+ * chunks have been copied. We will loop, incrementing a0 and a1 until a0
+ * equals a3.
+ */
+
+L(aligned):
+ andi t8,a2,NSIZEDMASK /* any whole 64-byte/128-byte chunks? */
+ beq a2,t8,L(chkw) /* if a2==t8, no 64-byte/128-byte chunks */
+ PTR_SUBU a3,a2,t8 /* subtract from a2 the reminder */
+ PTR_ADDU a3,a0,a3 /* Now a3 is the final dst after loop */
+
+/* When in the loop we may prefetch with the 'prepare to store' hint,
+ * in this case the a0+x should not be past the "t0-32" address. This
+ * means: for x=128 the last "safe" a0 address is "t0-160". Alternatively,
+ * for x=64 the last "safe" a0 address is "t0-96" In the current version we
+ * will use "prefetch hint,128(a0)", so "t0-160" is the limit.
+ */
+#if defined(USE_PREFETCH) && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
+ PTR_ADDU t0,a0,a2 /* t0 is the "past the end" address */
+ PTR_SUBU t9,t0,PREFETCH_LIMIT /* t9 is the "last safe pref" address */
+#endif
+ PREFETCH_FOR_LOAD (0, a1)
+ PREFETCH_FOR_LOAD (1, a1)
+ PREFETCH_FOR_LOAD (2, a1)
+ PREFETCH_FOR_STORE (1, a0)
+#if defined(USE_PREFETCH) && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
+ sltu v1,t9,a0 /* If a0 > t9 don't use next prefetch */
+ bgtz v1,L(loop16w)
nop
-
-L(shift):
- subu a3, zero, a0 # Src and Dest unaligned
- andi a3, 0x3 # (unoptimized case...)
- beq a3, zero, L(shft1)
- subu a2, a3 # a2 = bytes left
- LWHI t0, 0(a1) # Take care of first odd part
- LWLO t0, 3(a1)
- addu a1, a3
- SWHI t0, 0(a0)
- addu a0, a3
-L(shft1):
- andi t0, a2, 0x3
- subu a3, a2, t0
- addu a3, a1
-L(shfth):
- LWHI t1, 0(a1) # Limp through, word by word
- LWLO t1, 3(a1)
- addiu a0, 4
- addiu a1, 4
- bne a1, a3, L(shfth)
- sw t1, -4(a0)
- b L(last8) # Handle anything which may be left
- move a2, t0
-
+#endif
+ PREFETCH_FOR_STORE (2, a0)
+L(loop16w):
+ PREFETCH_FOR_LOAD (3, a1)
+ C_LD t0,UNIT(0)(a1)
+#if defined(USE_PREFETCH) && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
+ bgtz v1,L(skip_pref30_96)
+#endif
+ C_LD t1,UNIT(1)(a1)
+ PREFETCH_FOR_STORE (3, a0)
+L(skip_pref30_96):
+ C_LD REG2,UNIT(2)(a1)
+ C_LD REG3,UNIT(3)(a1)
+ C_LD REG4,UNIT(4)(a1)
+ C_LD REG5,UNIT(5)(a1)
+ C_LD REG6,UNIT(6)(a1)
+ C_LD REG7,UNIT(7)(a1)
+ PREFETCH_FOR_LOAD (4, a1)
+
+ C_ST t0,UNIT(0)(a0)
+ C_ST t1,UNIT(1)(a0)
+ C_ST REG2,UNIT(2)(a0)
+ C_ST REG3,UNIT(3)(a0)
+ C_ST REG4,UNIT(4)(a0)
+ C_ST REG5,UNIT(5)(a0)
+ C_ST REG6,UNIT(6)(a0)
+ C_ST REG7,UNIT(7)(a0)
+
+ C_LD t0,UNIT(8)(a1)
+#if defined(USE_PREFETCH) && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
+ bgtz v1,L(skip_pref30_128)
+#endif
+ C_LD t1,UNIT(9)(a1)
+ PREFETCH_FOR_STORE (4, a0)
+L(skip_pref30_128):
+ C_LD REG2,UNIT(10)(a1)
+ C_LD REG3,UNIT(11)(a1)
+ C_LD REG4,UNIT(12)(a1)
+ C_LD REG5,UNIT(13)(a1)
+ C_LD REG6,UNIT(14)(a1)
+ C_LD REG7,UNIT(15)(a1)
+ PREFETCH_FOR_LOAD (5, a1)
+ C_ST t0,UNIT(8)(a0)
+ C_ST t1,UNIT(9)(a0)
+ C_ST REG2,UNIT(10)(a0)
+ C_ST REG3,UNIT(11)(a0)
+ C_ST REG4,UNIT(12)(a0)
+ C_ST REG5,UNIT(13)(a0)
+ C_ST REG6,UNIT(14)(a0)
+ C_ST REG7,UNIT(15)(a0)
+ PTR_ADDIU a0,a0,UNIT(16) /* adding 64/128 to dest */
+#if defined(USE_PREFETCH) && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
+ sltu v1,t9,a0
+#endif
+ bne a0,a3,L(loop16w)
+ PTR_ADDIU a1,a1,UNIT(16) /* adding 64/128 to src */
+ move a2,t8
+
+/* Here we have src and dest word-aligned but less than 64-bytes or
+ * 128 bytes to go. Check for a 32(64) byte chunk and copy if if there
+ * is one. Otherwise jump down to L(chk1w) to handle the tail end of
+ * the copy.
+ */
+
+L(chkw):
+ PREFETCH_FOR_LOAD (0, a1)
+ andi t8,a2,NSIZEMASK /* Is there a 32-byte/64-byte chunk. */
+ /* The t8 is the reminder count past 32-bytes */
+ beq a2,t8,L(chk1w) /* When a2=t8, no 32-byte chunk */
+ nop
+ C_LD t0,UNIT(0)(a1)
+ C_LD t1,UNIT(1)(a1)
+ C_LD REG2,UNIT(2)(a1)
+ C_LD REG3,UNIT(3)(a1)
+ C_LD REG4,UNIT(4)(a1)
+ C_LD REG5,UNIT(5)(a1)
+ C_LD REG6,UNIT(6)(a1)
+ C_LD REG7,UNIT(7)(a1)
+ PTR_ADDIU a1,a1,UNIT(8)
+ C_ST t0,UNIT(0)(a0)
+ C_ST t1,UNIT(1)(a0)
+ C_ST REG2,UNIT(2)(a0)
+ C_ST REG3,UNIT(3)(a0)
+ C_ST REG4,UNIT(4)(a0)
+ C_ST REG5,UNIT(5)(a0)
+ C_ST REG6,UNIT(6)(a0)
+ C_ST REG7,UNIT(7)(a0)
+ PTR_ADDIU a0,a0,UNIT(8)
+
+/*
+ * Here we have less then 32(64) bytes to copy. Set up for a loop to
+ * copy one word (or double word) at a time. Set a2 to count how many
+ * bytes we have to copy after all the word (or double word) chunks are
+ * copied and a3 to the dst pointer after all the (d)word chunks have
+ * been copied. We will loop, incrementing a0 and a1 until a0 equals a3.
+ */
+L(chk1w):
+ andi a2,t8,(NSIZE-1) /* a2 is the reminder past one (d)word chunks */
+ beq a2,t8,L(lastb)
+ PTR_SUBU a3,t8,a2 /* a3 is count of bytes in one (d)word chunks */
+ PTR_ADDU a3,a0,a3 /* a3 is the dst address after loop */
+
+/* copying in words (4-byte or 8-byte chunks) */
+L(wordCopy_loop):
+ C_LD REG3,UNIT(0)(a1)
+ PTR_ADDIU a1,a1,UNIT(1)
+ PTR_ADDIU a0,a0,UNIT(1)
+ bne a0,a3,L(wordCopy_loop)
+ C_ST REG3,UNIT(-1)(a0)
+
+/* Copy the last 8 (or 16) bytes */
+L(lastb):
+ blez a2,L(leave)
+ PTR_ADDU a3,a0,a2 /* a3 is the last dst address */
+L(lastbloop):
+ lb v1,0(a1)
+ PTR_ADDIU a1,a1,1
+ PTR_ADDIU a0,a0,1
+ bne a0,a3,L(lastbloop)
+ sb v1,-1(a0)
+L(leave):
+ j ra
+ nop
+/*
+ * UNALIGNED case, got here with a3 = "negu a0"
+ * This code is nearly identical to the aligned code above
+ * but only the destination (not the source) gets aligned
+ * so we need to do partial loads of the source followed
+ * by normal stores to the destination (once we have aligned
+ * the destination).
+ */
+
+L(unaligned):
+ andi a3,a3,(NSIZE-1) /* copy a3 bytes to align a0/a1 */
+ beqz a3,L(ua_chk16w) /* if a3=0, it is already aligned */
+ PTR_SUBU a2,a2,a3 /* a2 is the remining bytes count */
+
+ C_LDHI v1,UNIT(0)(a1)
+ C_LDLO v1,UNITM1(1)(a1)
+ PTR_ADDU a1,a1,a3
+ C_STHI v1,UNIT(0)(a0)
+ PTR_ADDU a0,a0,a3
+
+/*
+ * Now the destination (but not the source) is aligned
+ * Set a2 to count how many bytes we have to copy after all the 64/128 byte
+ * chunks are copied and a3 to the dst pointer after all the 64/128 byte
+ * chunks have been copied. We will loop, incrementing a0 and a1 until a0
+ * equals a3.
+ */
+
+L(ua_chk16w):
+ andi t8,a2,NSIZEDMASK /* any whole 64-byte/128-byte chunks? */
+ beq a2,t8,L(ua_chkw) /* if a2==t8, no 64-byte/128-byte chunks */
+ PTR_SUBU a3,a2,t8 /* subtract from a2 the reminder */
+ PTR_ADDU a3,a0,a3 /* Now a3 is the final dst after loop */
+
+#if defined(USE_PREFETCH) && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
+ PTR_ADDU t0,a0,a2 /* t0 is the "past the end" address */
+ PTR_SUBU t9,t0,PREFETCH_LIMIT /* t9 is the "last safe pref" address */
+#endif
+ PREFETCH_FOR_LOAD (0, a1)
+ PREFETCH_FOR_LOAD (1, a1)
+ PREFETCH_FOR_LOAD (2, a1)
+ PREFETCH_FOR_STORE (1, a0)
+#if defined(USE_PREFETCH) && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
+ sltu v1,t9,a0
+ bgtz v1,L(ua_loop16w) /* skip prefetch for too short arrays */
+ nop
+#endif
+ PREFETCH_FOR_STORE (2, a0)
+L(ua_loop16w):
+ PREFETCH_FOR_LOAD (3, a1)
+ C_LDHI t0,UNIT(0)(a1)
+ C_LDLO t0,UNITM1(1)(a1)
+ C_LDHI t1,UNIT(1)(a1)
+#if defined(USE_PREFETCH) && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
+ bgtz v1,L(ua_skip_pref30_96)
+#endif
+ C_LDLO t1,UNITM1(2)(a1)
+ PREFETCH_FOR_STORE (3, a0)
+L(ua_skip_pref30_96):
+ C_LDHI REG2,UNIT(2)(a1)
+ C_LDLO REG2,UNITM1(3)(a1)
+ C_LDHI REG3,UNIT(3)(a1)
+ C_LDLO REG3,UNITM1(4)(a1)
+ C_LDHI REG4,UNIT(4)(a1)
+ C_LDLO REG4,UNITM1(5)(a1)
+ C_LDHI REG5,UNIT(5)(a1)
+ C_LDLO REG5,UNITM1(6)(a1)
+ C_LDHI REG6,UNIT(6)(a1)
+ C_LDLO REG6,UNITM1(7)(a1)
+ C_LDHI REG7,UNIT(7)(a1)
+ C_LDLO REG7,UNITM1(8)(a1)
+ PREFETCH_FOR_LOAD (4, a1)
+ C_ST t0,UNIT(0)(a0)
+ C_ST t1,UNIT(1)(a0)
+ C_ST REG2,UNIT(2)(a0)
+ C_ST REG3,UNIT(3)(a0)
+ C_ST REG4,UNIT(4)(a0)
+ C_ST REG5,UNIT(5)(a0)
+ C_ST REG6,UNIT(6)(a0)
+ C_ST REG7,UNIT(7)(a0)
+ C_LDHI t0,UNIT(8)(a1)
+ C_LDLO t0,UNITM1(9)(a1)
+ C_LDHI t1,UNIT(9)(a1)
+#if defined(USE_PREFETCH) && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
+ bgtz v1,L(ua_skip_pref30_128)
+#endif
+ C_LDLO t1,UNITM1(10)(a1)
+ PREFETCH_FOR_STORE (4, a0)
+L(ua_skip_pref30_128):
+ C_LDHI REG2,UNIT(10)(a1)
+ C_LDLO REG2,UNITM1(11)(a1)
+ C_LDHI REG3,UNIT(11)(a1)
+ C_LDLO REG3,UNITM1(12)(a1)
+ C_LDHI REG4,UNIT(12)(a1)
+ C_LDLO REG4,UNITM1(13)(a1)
+ C_LDHI REG5,UNIT(13)(a1)
+ C_LDLO REG5,UNITM1(14)(a1)
+ C_LDHI REG6,UNIT(14)(a1)
+ C_LDLO REG6,UNITM1(15)(a1)
+ C_LDHI REG7,UNIT(15)(a1)
+ C_LDLO REG7,UNITM1(16)(a1)
+ PREFETCH_FOR_LOAD (5, a1)
+ C_ST t0,UNIT(8)(a0)
+ C_ST t1,UNIT(9)(a0)
+ C_ST REG2,UNIT(10)(a0)
+ C_ST REG3,UNIT(11)(a0)
+ C_ST REG4,UNIT(12)(a0)
+ C_ST REG5,UNIT(13)(a0)
+ C_ST REG6,UNIT(14)(a0)
+ C_ST REG7,UNIT(15)(a0)
+ PTR_ADDIU a0,a0,UNIT(16) /* adding 64/128 to dest */
+#if defined(USE_PREFETCH) && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
+ sltu v1,t9,a0
+#endif
+ bne a0,a3,L(ua_loop16w)
+ PTR_ADDIU a1,a1,UNIT(16) /* adding 64/128 to src */
+ move a2,t8
+
+/* Here we have src and dest word-aligned but less than 64-bytes or
+ * 128 bytes to go. Check for a 32(64) byte chunk and copy if if there
+ * is one. Otherwise jump down to L(ua_chk1w) to handle the tail end of
+ * the copy. */
+
+L(ua_chkw):
+ PREFETCH_FOR_LOAD (0, a1)
+ andi t8,a2,NSIZEMASK /* Is there a 32-byte/64-byte chunk. */
+ /* t8 is the reminder count past 32-bytes */
+ beq a2,t8,L(ua_chk1w) /* When a2=t8, no 32-byte chunk */
+ nop
+ C_LDHI t0,UNIT(0)(a1)
+ C_LDLO t0,UNITM1(1)(a1)
+ C_LDHI t1,UNIT(1)(a1)
+ C_LDLO t1,UNITM1(2)(a1)
+ C_LDHI REG2,UNIT(2)(a1)
+ C_LDLO REG2,UNITM1(3)(a1)
+ C_LDHI REG3,UNIT(3)(a1)
+ C_LDLO REG3,UNITM1(4)(a1)
+ C_LDHI REG4,UNIT(4)(a1)
+ C_LDLO REG4,UNITM1(5)(a1)
+ C_LDHI REG5,UNIT(5)(a1)
+ C_LDLO REG5,UNITM1(6)(a1)
+ C_LDHI REG6,UNIT(6)(a1)
+ C_LDLO REG6,UNITM1(7)(a1)
+ C_LDHI REG7,UNIT(7)(a1)
+ C_LDLO REG7,UNITM1(8)(a1)
+ PTR_ADDIU a1,a1,UNIT(8)
+ C_ST t0,UNIT(0)(a0)
+ C_ST t1,UNIT(1)(a0)
+ C_ST REG2,UNIT(2)(a0)
+ C_ST REG3,UNIT(3)(a0)
+ C_ST REG4,UNIT(4)(a0)
+ C_ST REG5,UNIT(5)(a0)
+ C_ST REG6,UNIT(6)(a0)
+ C_ST REG7,UNIT(7)(a0)
+ PTR_ADDIU a0,a0,UNIT(8)
+/*
+ * Here we have less then 32(64) bytes to copy. Set up for a loop to
+ * copy one word (or double word) at a time.
+ */
+L(ua_chk1w):
+ andi a2,t8,(NSIZE-1) /* a2 is the reminder past one (d)word chunks */
+ beq a2,t8,L(ua_smallCopy)
+ PTR_SUBU a3,t8,a2 /* a3 is count of bytes in one (d)word chunks */
+ PTR_ADDU a3,a0,a3 /* a3 is the dst address after loop */
+
+/* copying in words (4-byte or 8-byte chunks) */
+L(ua_wordCopy_loop):
+ C_LDHI v1,UNIT(0)(a1)
+ C_LDLO v1,UNITM1(1)(a1)
+ PTR_ADDIU a1,a1,UNIT(1)
+ PTR_ADDIU a0,a0,UNIT(1)
+ bne a0,a3,L(ua_wordCopy_loop)
+ C_ST v1,UNIT(-1)(a0)
+
+/* Copy the last 8 (or 16) bytes */
+L(ua_smallCopy):
+ beqz a2,L(leave)
+ PTR_ADDU a3,a0,a2 /* a3 is the last dst address */
+L(ua_smallCopy_loop):
+ lb v1,0(a1)
+ PTR_ADDIU a1,a1,1
+ PTR_ADDIU a0,a0,1
+ bne a0,a3,L(ua_smallCopy_loop)
+ sb v1,-1(a0)
+
+ j ra
+ nop
+
+ .set at
.set reorder
-END (memcpy)
-libc_hidden_builtin_def (memcpy)
+END(MEMCPY_NAME)
+#ifdef _LIBC
+libc_hidden_builtin_def (MEMCPY_NAME)
+#endif
Removed: fsf/trunk/libc/ports/sysdeps/mips/mips64/memcpy.S
==============================================================================
--- fsf/trunk/libc/ports/sysdeps/mips/mips64/memcpy.S (original)
+++ fsf/trunk/libc/ports/sysdeps/mips/mips64/memcpy.S (removed)
@@ -1,138 +1,0 @@
-/* Copyright (C) 2002-2012 Free Software Foundation, Inc.
- This file is part of the GNU C Library.
- Contributed by Hartvig Ekner <hartvige@xxxxxxxx>, 2002.
- Ported to mips3 n32/n64 by Alexandre Oliva <aoliva@xxxxxxxxxx>
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library. If not, see
- <http://www.gnu.org/licenses/>. */
-
-#include <sysdep.h>
-#include <sys/asm.h>
-
-
-/* void *memcpy(void *s1, const void *s2, size_t n);
-
- This could probably be optimized further. */
-
-#if __MIPSEB
-# define LDHI ldl /* high part is left in big-endian */
-# define SDHI sdl /* high part is left in big-endian */
-# define LDLO ldr /* low part is right in big-endian */
-# define SDLO sdr /* low part is right in big-endian */
-#else
-# define LDHI ldr /* high part is right in little-endian */
-# define SDHI sdr /* high part is right in little-endian */
-# define LDLO ldl /* low part is left in little-endian */
-# define SDLO sdl /* low part is left in little-endian */
-#endif
-
-ENTRY (memcpy)
- .set noreorder
-
- slti t0, a2, 16 # Less than 16?
- bne t0, zero, L(last16)
- move v0, a0 # Setup exit value before too late
-
- xor t0, a1, a0 # Find a0/a1 displacement
- andi t0, 0x7
- bne t0, zero, L(shift) # Go handle the unaligned case
- PTR_SUBU t1, zero, a1
- andi t1, 0x7 # a0/a1 are aligned, but are we
- beq t1, zero, L(chk8w) # starting in the middle of a word?
- PTR_SUBU a2, t1
- LDHI t0, 0(a1) # Yes we are... take care of that
- PTR_ADDU a1, t1
- SDHI t0, 0(a0)
- PTR_ADDU a0, t1
-
-L(chk8w):
- andi t0, a2, 0x3f # 64 or more bytes left?
- beq t0, a2, L(chk1w)
- PTR_SUBU a3, a2, t0 # Yes
- PTR_ADDU a3, a1 # a3 = end address of loop
- move a2, t0 # a2 = what will be left after loop
-L(lop8w):
- ld t0, 0(a1) # Loop taking 8 words at a time
- ld t1, 8(a1)
- ld t2, 16(a1)
- ld t3, 24(a1)
- ld ta0, 32(a1)
- ld ta1, 40(a1)
- ld ta2, 48(a1)
- ld ta3, 56(a1)
- PTR_ADDIU a0, 64
- PTR_ADDIU a1, 64
- sd t0, -64(a0)
- sd t1, -56(a0)
- sd t2, -48(a0)
- sd t3, -40(a0)
- sd ta0, -32(a0)
- sd ta1, -24(a0)
- sd ta2, -16(a0)
- bne a1, a3, L(lop8w)
- sd ta3, -8(a0)
-
-L(chk1w):
- andi t0, a2, 0x7 # 8 or more bytes left?
- beq t0, a2, L(last16)
- PTR_SUBU a3, a2, t0 # Yes, handle them one dword at a time
- PTR_ADDU a3, a1 # a3 again end address
- move a2, t0
-L(lop1w):
- ld t0, 0(a1)
- PTR_ADDIU a0, 8
- PTR_ADDIU a1, 8
- bne a1, a3, L(lop1w)
- sd t0, -8(a0)
-
-L(last16):
- blez a2, L(lst16e) # Handle last 16 bytes, one at a time
- PTR_ADDU a3, a2, a1
-L(lst16l):
- lb t0, 0(a1)
- PTR_ADDIU a0, 1
- PTR_ADDIU a1, 1
- bne a1, a3, L(lst16l)
- sb t0, -1(a0)
-L(lst16e):
- jr ra # Bye, bye
- nop
-
-L(shift):
- PTR_SUBU a3, zero, a0 # Src and Dest unaligned
- andi a3, 0x7 # (unoptimized case...)
- beq a3, zero, L(shft1)
- PTR_SUBU a2, a3 # a2 = bytes left
- LDHI t0, 0(a1) # Take care of first odd part
- LDLO t0, 7(a1)
- PTR_ADDU a1, a3
- SDHI t0, 0(a0)
- PTR_ADDU a0, a3
-L(shft1):
- andi t0, a2, 0x7
- PTR_SUBU a3, a2, t0
- PTR_ADDU a3, a1
-L(shfth):
- LDHI t1, 0(a1) # Limp through, dword by dword
- LDLO t1, 7(a1)
- PTR_ADDIU a0, 8
- PTR_ADDIU a1, 8
- bne a1, a3, L(shfth)
- sd t1, -8(a0)
- b L(last16) # Handle anything which may be left
- move a2, t0
-
- .set reorder
-END (memcpy)
-libc_hidden_builtin_def (memcpy)
Modified: fsf/trunk/libc/ports/sysdeps/unix/sysv/linux/powerpc/powerpc32/nofpu/nptl/libc.abilist
==============================================================================
--- fsf/trunk/libc/ports/sysdeps/unix/sysv/linux/powerpc/powerpc32/nofpu/nptl/libc.abilist (original)
+++ fsf/trunk/libc/ports/sysdeps/unix/sysv/linux/powerpc/powerpc32/nofpu/nptl/libc.abilist Thu Nov 1 00:01:46 2012
@@ -1774,13 +1774,13 @@
timespec_get F
GLIBC_2.17
GLIBC_2.17 A
+ __ppc_get_timebase_freq F
clock_getcpuclockid F
clock_getres F
clock_gettime F
clock_nanosleep F
clock_settime F
secure_getenv F
- __ppc_get_timebase_freq F
GLIBC_2.2
GLIBC_2.2 A
_IO_adjust_wcolumn F
Modified: fsf/trunk/libc/rt/tst-shm.c
==============================================================================
--- fsf/trunk/libc/rt/tst-shm.c (original)
+++ fsf/trunk/libc/rt/tst-shm.c Thu Nov 1 00:01:46 2012
@@ -73,7 +73,7 @@
error (EXIT_FAILURE, 0, "size incorrect");
mem = mmap (NULL, 4000, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
- if (mem == NULL)
+ if (mem == MAP_FAILED)
error (EXIT_FAILURE, 0, "mmap failed");
ts.tv_sec = 0;
Removed: fsf/trunk/libc/sysdeps/i386/tininess.h
==============================================================================
--- fsf/trunk/libc/sysdeps/i386/tininess.h (original)
+++ fsf/trunk/libc/sysdeps/i386/tininess.h (removed)
@@ -1,1 +1,0 @@
-#define TININESS_AFTER_ROUNDING 1
Modified: fsf/trunk/libc/sysdeps/ieee754/dbl-64/s_fma.c
==============================================================================
--- fsf/trunk/libc/sysdeps/ieee754/dbl-64/s_fma.c (original)
+++ fsf/trunk/libc/sysdeps/ieee754/dbl-64/s_fma.c Thu Nov 1 00:01:46 2012
@@ -22,6 +22,7 @@
#include <fenv.h>
#include <ieee754.h>
#include <math_private.h>
+#include <tininess.h>
/* This implementation uses rounding to odd to avoid problems with
double rounding. See a paper by Boldo and Melquiond:
@@ -208,6 +209,17 @@
for proper rounding. */
if (v.ieee.exponent == 106)
{
+ /* If the exponent would be in the normal range when
+ rounding to normal precision with unbounded exponent
+ range, the exact result is known and spurious underflows
+ must be avoided on systems detecting tininess after
+ rounding. */
+ if (TININESS_AFTER_ROUNDING)
+ {
+ w.d = a1 + u.d;
+ if (w.ieee.exponent == 107)
+ return w.d * 0x1p-106;
+ }
/* v.ieee.mantissa1 & 2 is LSB bit of the result before rounding,
v.ieee.mantissa1 & 1 is the round bit and j is our sticky
bit. */
Modified: fsf/trunk/libc/sysdeps/ieee754/ldbl-128/s_fmal.c
==============================================================================
--- fsf/trunk/libc/sysdeps/ieee754/ldbl-128/s_fmal.c (original)
+++ fsf/trunk/libc/sysdeps/ieee754/ldbl-128/s_fmal.c Thu Nov 1 00:01:46 2012
@@ -22,6 +22,7 @@
#include <fenv.h>
#include <ieee754.h>
#include <math_private.h>
+#include <tininess.h>
/* This implementation uses rounding to odd to avoid problems with
double rounding. See a paper by Boldo and Melquiond:
@@ -209,6 +210,17 @@
for proper rounding. */
if (v.ieee.exponent == 226)
{
+ /* If the exponent would be in the normal range when
+ rounding to normal precision with unbounded exponent
+ range, the exact result is known and spurious underflows
+ must be avoided on systems detecting tininess after
+ rounding. */
+ if (TININESS_AFTER_ROUNDING)
+ {
+ w.d = a1 + u.d;
+ if (w.ieee.exponent == 227)
+ return w.d * 0x1p-226L;
+ }
/* v.ieee.mantissa3 & 2 is LSB bit of the result before rounding,
v.ieee.mantissa3 & 1 is the round bit and j is our sticky
bit. */
Modified: fsf/trunk/libc/sysdeps/ieee754/ldbl-128ibm/e_atan2l.c
==============================================================================
--- fsf/trunk/libc/sysdeps/ieee754/ldbl-128ibm/e_atan2l.c (original)
+++ fsf/trunk/libc/sysdeps/ieee754/ldbl-128ibm/e_atan2l.c Thu Nov 1 00:01:46 2012
@@ -65,7 +65,8 @@
if(((ix)>0x7ff0000000000000LL)||
((iy)>0x7ff0000000000000LL)) /* x or y is NaN */
return x+y;
- if(((hx-0x3ff0000000000000LL))==0) return __atanl(y); /* x=1.0L */
+ if(((hx-0x3ff0000000000000LL))==0
+ && (lx&0x7fffffffffffffff)==0) return __atanl(y); /* x=1.0L */
m = ((hy>>63)&1)|((hx>>62)&2); /* 2*sign(x)+sign(y) */
/* when y = 0 */
Modified: fsf/trunk/libc/sysdeps/ieee754/ldbl-96/s_fmal.c
==============================================================================
--- fsf/trunk/libc/sysdeps/ieee754/ldbl-96/s_fmal.c (original)
+++ fsf/trunk/libc/sysdeps/ieee754/ldbl-96/s_fmal.c Thu Nov 1 00:01:46 2012
@@ -22,6 +22,7 @@
#include <fenv.h>
#include <ieee754.h>
#include <math_private.h>
+#include <tininess.h>
/* This implementation uses rounding to odd to avoid problems with
double rounding. See a paper by Boldo and Melquiond:
@@ -209,6 +210,17 @@
for proper rounding. */
if (v.ieee.exponent == 128)
{
+ /* If the exponent would be in the normal range when
+ rounding to normal precision with unbounded exponent
+ range, the exact result is known and spurious underflows
+ must be avoided on systems detecting tininess after
+ rounding. */
+ if (TININESS_AFTER_ROUNDING)
+ {
+ w.d = a1 + u.d;
+ if (w.ieee.exponent == 129)
+ return w.d * 0x1p-128L;
+ }
/* v.ieee.mantissa1 & 2 is LSB bit of the result before rounding,
v.ieee.mantissa1 & 1 is the round bit and j is our sticky
bit. */
Modified: fsf/trunk/libc/sysdeps/powerpc/fpu/libm-test-ulps
==============================================================================
--- fsf/trunk/libc/sysdeps/powerpc/fpu/libm-test-ulps (original)
+++ fsf/trunk/libc/sysdeps/powerpc/fpu/libm-test-ulps Thu Nov 1 00:01:46 2012
@@ -760,6 +760,35 @@
ifloat: 2
# clog
+Test "Real part of: clog (-0x1.0000000123456p0 + 0x1.2345678p-1000 i) == 2.649094276923003995420209214900915462737e-10 + 3.141592653589793238462643383279502884197 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
+Test "Real part of: clog (-0x1.0000000123456p0 + 0x1.2345678p-30 i) == 2.649094282537168795982991778475646793277e-10 + 3.141592652530155111500161671113150737892 i":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog (-0x1.234566p-40 - 1.0 i) == 5.354083939753840089583620652120903838944e-25 - 1.570796326795931422008642456283782656359 i":
+float: 1
+ifloat: 1
+Test "Real part of: clog (-0x1.fp+127 + 0x1p-149 i) == 88.69109041335841930424871526389807508374 + pi i":
+float: 1
+ifloat: 1
+Test "Real part of: clog (-0x1.fp+127 - 0x1p-149 i) == 88.69109041335841930424871526389807508374 - pi i":
+float: 1
+ifloat: 1
+Test "Real part of: clog (-0x1p-149 + 0x1.fp+127 i) == 88.69109041335841930424871526389807508374 + pi/2 i":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog (-0x1p-149 + 0x1.fp+127 i) == 88.69109041335841930424871526389807508374 + pi/2 i":
+float: 1
+ifloat: 1
+Test "Real part of: clog (-0x1p-149 - 0x1.fp+127 i) == 88.69109041335841930424871526389807508374 - pi/2 i":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog (-0x1p-149 - 0x1.fp+127 i) == 88.69109041335841930424871526389807508374 - pi/2 i":
+float: 1
+ifloat: 1
Test "Imaginary part of: clog (-2 - 3 i) == 1.2824746787307683680267437207826593 - 2.1587989303424641704769327722648368 i":
float: 3
ifloat: 3
@@ -773,13 +802,69 @@
Test "Imaginary part of: clog (0.75 + 1.25 i) == 0.376885901188190075998919126749298416 + 1.03037682652431246378774332703115153 i":
ildouble: 1
ldouble: 1
+Test "Real part of: clog (0x0.ffffffp0 + 0x0.ffffffp-100 i) == -5.960464655174753498633255797994360530379e-8 + 7.888609052210118054117285652827862296732e-31 i":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x1.000566p0 + 0x1.234p-10 i) == 8.298731898331237038231468223024422855654e-5 + 1.110938609507128729312743251313024793990e-3 i":
+float: 1
+ifloat: 1
Test "Imaginary part of: clog (0x1.fffffffffffffp+1023 + 0x1p+1023 i) == 709.8942846690411016323109979483151967689 + 0.4636476090008061606231772164674799632783 i":
double: 1
idouble: 1
+Test "Real part of: clog (0x1.fp+127 + 0x1p-149 i) == 88.69109041335841930424871526389807508374 + +0 i":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x1.fp+127 - 0x1p-149 i) == 88.69109041335841930424871526389807508374 - 0 i":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog (0x11682p-23 + 0x7ffed1p-23 i) == 1.1723955140027907954461000991619077811832e-12 + 1.5622968405332756349813737986164832897108 i":
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog (0x155f8afc4c48685bf63610p-85 + 0x17d0cf2652cdbeb1294e19p-85 i) == -4.7775669192897997174762089350332738583822e-50 + 0.8393953487996880419413728440067635213372 i":
+ildouble: 2
+ldouble: 2
+Test "Imaginary part of: clog (0x15cfbd1990d1ffp-53 + 0x176a3973e09a9ap-53 i) == 1.0168910106364605304135563536838075568606e-30 + 0.8208373755522359859870890246475340086663 i":
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog (0x187190c1a334497bdbde5a95f48p-106 + 0x3b25f08062d0a095c4cfbbc338dp-106 i) == -1.7471844652198029695350765775994001163767e-63 + 1.1789110097072986038243729592318526094314 i":
+ildouble: 1
+ldouble: 1
Test "Real part of: clog (0x1p-1074 + 0x1p-1074 i) == -744.0934983311012896593986823853525458290 + pi/4 i":
double: 1
idouble: 1
Test "Real part of: clog (0x1p-147 + 0x1p-147 i) == -101.5460619520319878296245057936228672231 + pi/4 i":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x1p-149 + 0x1.fp+127 i) == 88.69109041335841930424871526389807508374 + pi/2 i":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x1p-149 - 0x1.fp+127 i) == 88.69109041335841930424871526389807508374 - pi/2 i":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog (0x2818p-15 + 0x798fp-15 i) == 1.5366822245016167178749091974664853785194e-08 + 1.2522014929038946066987318471922169174157 i":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog (0x4d4ep-15 + 0x6605p-15 i) == -1.6298145321400412054744424587143483169412e-08 + 0.9223574537155056772124552172295398141249 i":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog (0x4d9c37e2b5cb4533p-63 + 0x65c98be2385a042ep-63 i) == 6.4064442119814669184296141278612389400075e-37 + 0.9193591364645830864185131402313014890145 i":
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog (0x6241ef0da53f539f02fad67dabp-106 + 0x3fb46641182f7efd9caa769dac0p-106 i) == 4.3299788920664682288477984749202524623248e-63 + 1.4746938237585656250866370987773473745867 i":
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog (0xa1f2c1p-24 + 0xc643aep-24 i) == -1.0480505352462576151523512837107080269981e-13 + 0.8858771987699967480545613322309315260313 i":
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog (0xa4722f19346cp-51 + 0x7f9631c5e7f07p-51 i) == -6.2122796286154679676173624516405339768606e-30 + 1.4904138780720095276446375492434049214172 i":
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog (0xf2p-10 + 0x3e3p-10 i) == 6.1988446308070710970664736815277450078106e-06 + 1.3322126499153926210226335249558203898460 i":
+ildouble: 1
+ldouble: 1
+Test "Real part of: clog (1.0 + 0x1.234566p-10 i) == 6.172834701221959432440126967147726538097e-7 + 1.111110564353742042376451655136933182201e-3 i":
float: 1
ifloat: 1
@@ -798,6 +883,69 @@
ifloat: 1
ildouble: 1
ldouble: 1
+Test "Real part of: clog10 (-0x1.0000000123456p0 + 0x1.2345678p-1000 i) == 1.150487026509145544402795327729455391948e-10 + 1.364376353841841347485783625431355770210 i":
+double: 2
+idouble: 2
+ildouble: 2
+ldouble: 2
+Test "Imaginary part of: clog10 (-0x1.0000000123456p0 + 0x1.2345678p-1000 i) == 1.150487026509145544402795327729455391948e-10 + 1.364376353841841347485783625431355770210 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
+Test "Real part of: clog10 (-0x1.0000000123456p0 + 0x1.2345678p-30 i) == 1.150487028947346337782682105935961875822e-10 + 1.364376353381646356131680448946397884147 i":
+double: 2
+idouble: 2
+Test "Imaginary part of: clog10 (-0x1.0000000123456p0 + 0x1.2345678p-30 i) == 1.150487028947346337782682105935961875822e-10 + 1.364376353381646356131680448946397884147 i":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (-0x1.fp+1023 + 0x1p-1074 i) == 308.2409272754311106024666378243768099991 + 1.364376353841841347485783625431355770210 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (-0x1.fp+1023 - 0x1p-1074 i) == 308.2409272754311106024666378243768099991 - 1.364376353841841347485783625431355770210 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (-0x1.fp+127 + 0x1p-149 i) == 38.51805116050395969095658815123105801479 + 1.364376353841841347485783625431355770210 i":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (-0x1.fp+127 - 0x1p-149 i) == 38.51805116050395969095658815123105801479 - 1.364376353841841347485783625431355770210 i":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (-0x1p-1074 + 0x1.fp+1023 i) == 308.2409272754311106024666378243768099991 + 0.6821881769209206737428918127156778851051 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (-0x1p-1074 - 0x1.fp+1023 i) == 308.2409272754311106024666378243768099991 - 0.6821881769209206737428918127156778851051 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (-0x1p-149 + 0x1.fp+127 i) == 38.51805116050395969095658815123105801479 + 0.6821881769209206737428918127156778851051 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (-0x1p-149 - 0x1.fp+127 i) == 38.51805116050395969095658815123105801479 - 0.6821881769209206737428918127156778851051 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (-1.0 + 0x1.234566p-20 i) == 2.556638434669064077889576526006849923281e-13 + 1.364375882602207106407956770293808181427 i":
+double: 1
+idouble: 1
Test "Real part of: clog10 (-2 - 3 i) == 0.556971676153418384603252578971164214 - 0.937554462986374708541507952140189646 i":
double: 1
idouble: 1
@@ -870,8 +1018,40 @@
Test "Real part of: clog10 (0.75 + 1.25 i) == 0.163679467193165171449476605077428975 + 0.447486970040493067069984724340855636 i":
float: 2
ifloat: 2
-ildouble: 3
-ldouble: 3
+ildouble: 1
+ldouble: 1
+Test "Real part of: clog10 (0x0.fffffffffffff8p0 + 0x0.fffffffffffff8p-1000 i) == -4.821637332766435821255375046554377090472e-17 + 4.053112396770095089737411317782466262176e-302 i":
+double: 1
+idouble: 1
+Test "Real part of: clog10 (0x0.ffffffp0 + 0x0.ffffffp-100 i) == -2.588596909321764128428416045209904492216e-8 + 3.425979381266895667295625489912064603415e-31 i":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+Test "Real part of: clog10 (0x1.000566p0 + 0x1.234p-10 i) == 3.604093470239754109961125085078190708674e-5 + 4.824745078422174667425851670822596859720e-4 i":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1.000566p0 + 0x1.234p-10 i) == 3.604093470239754109961125085078190708674e-5 + 4.824745078422174667425851670822596859720e-4 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
+Test "Real part of: clog10 (0x1.000566p0 + 0x1.234p-100 i) == 3.577293486783822178310971763308187385546e-5 + 3.897399639875661463735636919790792140598e-31 i":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1.234566p-30 + 1.0 i) == 2.438200411482400072282924063740535840474e-19 + 6.821881764607257184291586401763604544928e-1 i":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1.234566p-50 + 1.0 i) == 2.217530356103816369479108963807448194409e-31 + 6.821881769209202348667823902864283966959e-1 i":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1.234566p-60 + 1.0 i) == 2.114801746467415208319767917450504756866e-37 + 6.821881769209206733143018621078368211515e-1 i":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+ildouble: 1
+ldouble: 1
Test "Imaginary part of: clog10 (0x1.fffffep+127 + 0x1.fffffep+127 i) == 38.68235441693561449174780668781319348761 + pi/4*log10(e) i":
double: 1
float: 1
@@ -890,11 +1070,45 @@
Test "Imaginary part of: clog10 (0x1.fffffffffffffp+1023 + 0x1p+1023 i) == 308.3031705664207720674749211936626341569 + 0.2013595981366865903254995612594728746470 i":
double: 1
idouble: 1
+Test "Real part of: clog10 (0x10673dd0f2481p-51 + 0x7ef1d17cefbd2p-51 i) == 1.3918041236396763648388478552321724382899e-29 + 0.6263795733790237053262025311642907438291 i":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x10673dd0f2481p-51 + 0x7ef1d17cefbd2p-51 i) == 1.3918041236396763648388478552321724382899e-29 + 0.6263795733790237053262025311642907438291 i":
+ildouble: 1
+ldouble: 1
+Test "Real part of: clog10 (0x1367a310575591p-54 + 0x3cfcc0a0541f60p-54 i) == 2.2081507730821788480616336165447731164865e-32 + 0.5484039935757001196548030312819898864760 i":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x1367a310575591p-54 + 0x3cfcc0a0541f60p-54 i) == 2.2081507730821788480616336165447731164865e-32 + 0.5484039935757001196548030312819898864760 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (0x155f8afc4c48685bf63610p-85 + 0x17d0cf2652cdbeb1294e19p-85 i) == -2.0748709499710785084693619097712106753591e-50 + 0.3645447681189598740620098186365764884771 i":
+ildouble: 2
+ldouble: 2
+Test "Real part of: clog10 (0x15d8ab6ed05ca514086ac3a1e84p-105 + 0x1761e480aa094c0b10b34b09ce9p-105 i) == 4.3548095442952115860848857519953610343042e-63 + 0.3558376234889641500775150477035448866763 i":
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (0x164c74eea876p-45 + 0x16f393482f77p-45 i) == -1.3155760824064879362415202279780039150764e-26 + 0.3473590599762514228227328130640352044313 i":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x1a6p-10 + 0x3a5p-10 i) == -6.2126412844802358329771948751248003038444e-07 + 0.4977135139537443711784513409096950995985 i":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x1df515eb171a808b9e400266p-95 + 0x7c71eb0cd4688dfe98581c77p-95 i) == -1.5221162575729652613635150540947625639689e-57 + 0.5795934880811949230121092882659698986043 i":
+ildouble: 1
+ldouble: 1
Test "Imaginary part of: clog10 (0x1p-1073 + 0x1p-1073 i) == -322.8546703496198318667349645920187712089 + pi/4*log10(e) i":
double: 1
idouble: 1
ildouble: 1
ldouble: 1
+Test "Imaginary part of: clog10 (0x1p-1074 + 0x1.fp+1023 i) == 308.2409272754311106024666378243768099991 + 0.6821881769209206737428918127156778851051 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
Test "Real part of: clog10 (0x1p-1074 + 0x1p-1074 i) == -323.1557003452838130619487034867432642357 + pi/4*log10(e) i":
double: 1
idouble: 1
@@ -903,6 +1117,11 @@
idouble: 1
ildouble: 1
ldouble: 1
+Test "Imaginary part of: clog10 (0x1p-1074 - 0x1.fp+1023 i) == 308.2409272754311106024666378243768099991 - 0.6821881769209206737428918127156778851051 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
Test "Imaginary part of: clog10 (0x1p-147 + 0x1p-147 i) == -44.10089436477324509881274807713822842154 + pi/4*log10(e) i":
double: 1
float: 1
@@ -910,6 +1129,13 @@
ifloat: 1
ildouble: 1
ldouble: 1
+Test "Imaginary part of: clog10 (0x1p-149 + 0x1.fp+127 i) == 38.51805116050395969095658815123105801479 + 0.6821881769209206737428918127156778851051 i":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+ildouble: 1
+ldouble: 1
Test "Imaginary part of: clog10 (0x1p-149 + 0x1p-149 i) == -44.70295435610120748924022586658721447508 + pi/4*log10(e) i":
double: 1
float: 1
@@ -917,6 +1143,102 @@
ifloat: 1
ildouble: 1
ldouble: 1
+Test "Imaginary part of: clog10 (0x1p-149 - 0x1.fp+127 i) == 38.51805116050395969095658815123105801479 - 0.6821881769209206737428918127156778851051 i":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (0x1p-509 + 1.0 i) == 7.730698388614835910296270976605350994446e-308 + 6.821881769209206737428918127156778851051e-1 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (0x1p-510 + 1.0 i) == 1.932674597153708977574067744151337748612e-308 + 6.821881769209206737428918127156778851051e-1 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (0x1p-511 + 1.0 i) == 4.831686492884272443935169360378344371529e-309 + 6.821881769209206737428918127156778851051e-1 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (0x1p-61 + 1.0 i) == 4.084085680564517578238994467153626207224e-38 + 6.821881769209206735545466044044889962925e-1 i":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (0x1p-62 + 1.0 i) == 1.021021420141129394559748616788406551878e-38 + 6.821881769209206736487192085600834406988e-1 i":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1p-63 + 1.0 i) == 2.552553550352823486399371541971016379740e-39 + 6.821881769209206736958055106378806629019e-1 i":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: clog10 (0x2818p-15 + 0x798fp-15 i) == 6.6737261053986614395049481326819059203910e-09 + 0.5438241985991753781478398141908629586460 i":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (0x2818p-15 + 0x798fp-15 i) == 6.6737261053986614395049481326819059203910e-09 + 0.5438241985991753781478398141908629586460 i":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x298c62cb546588a7p-63 + 0x7911b1dfcc4ecdaep-63 i) == -5.1816837072162316773907242302011632570857e-37 + 0.5386167838952956925896424154370364458140 i":
+ildouble: 1
+ldouble: 1
+Test "Real part of: clog10 (0x2dd46725bp-35 + 0x7783a1284p-35 i) == 1.9312741086596516918394613098872836703188e-20 + 0.5231613813514771042838490538484014771862 i":
+double: 1
+idouble: 1
+Test "Real part of: clog10 (0x2ede88p-23 + 0x771c3fp-23 i) == -1.9440841725722970687903291200493082253766e-13 + 0.5193774116724956222518530053006822210323 i":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x2ede88p-23 + 0x771c3fp-23 i) == -1.9440841725722970687903291200493082253766e-13 + 0.5193774116724956222518530053006822210323 i":
+double: 1
+idouble: 1
+Test "Real part of: clog10 (0x4447d7175p-35 + 0x6c445e00ap-35 i) == -6.4375803621988389731799033530075237868110e-21 + 0.4378257977686804492768642780897650927167 i":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x4d4ep-15 + 0x6605p-15 i) == -7.0781945783414996953799915941870192015212e-09 + 0.4005747524909781155537088181659175147564 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (0x5b06b680ea2ccp-52 + 0xef452b965da9fp-52 i) == 3.6079845358966994996207055940336690133424e-30 + 0.5243112258263349992771652393178033846555 i":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x81b7efa81fc35ad1p-65 + 0x1ef4b835f1c79d812p-65 i) == -4.3074341162203896332989394770760901408798e-39 + 0.5709443672155660428417571212549720987784 i":
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (0x9b57bp-20 + 0xcb7b4p-20 i) == -1.7182001068739620267773842120965071561416e-11 + 0.3990121149225253562859800593935899629087 i":
+double: 1
+idouble: 1
+Test "Real part of: clog10 (0xf2p-10 + 0x3e3p-10 i) == 2.6921240173351112953324592659528481616879e-06 + 0.5785726025799636431142862788413361783862 i":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0xf2p-10 + 0x3e3p-10 i) == 2.6921240173351112953324592659528481616879e-06 + 0.5785726025799636431142862788413361783862 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
+Test "Imaginary part of: clog10 (0xfe961079616p-45 + 0x1bc37e09e6d1p-45 i) == 2.3329549194675052736016290082882121135546e-26 + 0.4561756099441139182878993697611751382976 i":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (1.0 + 0x1.234566p-10 i) == 2.680828048441605163181684680300513080769e-7 + 4.825491868832381486767558728169977751564e-4 i":
+double: 1
+idouble: 1
+ildouble: 1
+ldouble: 1
Test "Imaginary part of: clog10 (3 + inf i) == inf + pi/2*log10(e) i":
double: 1
float: 1
@@ -947,6 +1269,12 @@
ldouble: 1
# cos
+Test "cos (0x1p+120) == -9.25879022854837867303861764107414946730833e-01":
+float: 1
+ifloat: 1
+Test "cos (0x1p+127) == 7.81914638714960072263910298466369236613162e-01":
+float: 1
+ifloat: 1
Test "cos (16.0) == -0.9576594803233846418996372326511034717803":
ildouble: 2
ldouble: 2
@@ -1128,6 +1456,8 @@
float: 4
idouble: 1
ifloat: 4
+ildouble: 2
+ldouble: 2
Test "Imaginary part of: cpow (0.75 + 1.25 i, 0.75 + 1.25 i) == 0.117506293914473555420279832210420483 + 0.346552747708338676483025352060418001 i":
float: 1
ifloat: 1
@@ -1141,6 +1471,8 @@
float: 4
idouble: 2
ifloat: 4
+ildouble: 4
+ldouble: 4
Test "Imaginary part of: cpow (0.75 + 1.25 i, 1.0 + 1.0 i) == 0.0846958290317209430433805274189191353 + 0.513285749182902449043287190519090481 i":
float: 1
ifloat: 1
@@ -1255,6 +1587,9 @@
ldouble: 1
# csqrt
+Test "Real part of: csqrt (-0x1.000002p-126 - 0x1.000002p-126 i) == 4.934094449071842328766868579214125217132e-20 - 1.191195773697904627170323731331667740087e-19 i":
+double: 1
+idouble: 1
Test "Real part of: csqrt (-2 + 3 i) == 0.89597747612983812471573375529004348 + 1.6741492280355400404480393008490519 i":
float: 1
ifloat: 1
@@ -1273,6 +1608,9 @@
Test "Imaginary part of: csqrt (0 - 1 i) == M_SQRT_2_2 - M_SQRT_2_2 i":
double: 1
idouble: 1
+Test "Imaginary part of: csqrt (0x1.000002p-126 + 0x1.000002p-126 i) == 1.191195773697904627170323731331667740087e-19 + 4.934094449071842328766868579214125217132e-20 i":
+double: 1
+idouble: 1
Test "Imaginary part of: csqrt (0x1.fffffep+127 + 1.0 i) == 1.844674352395372953599975585936590505260e+19 + 2.710505511993121390769065968615872097053e-20 i":
float: 1
ifloat: 1
@@ -1293,6 +1631,9 @@
Test "Imaginary part of: csqrt (0x1p-1073 + 0x1p-1073 i) == 3.453664695497464982856905711457966660085e-162 + 1.430554756764195530630723976279903095110e-162 i":
double: 1
idouble: 1
+Test "Imaginary part of: csqrt (0x1p-1074 + 0x1p-1074 i) == 2.442109726130830256743814843868934877597e-162 + 1.011554969366634726113090867589031782487e-162 i":
+ildouble: 1
+ldouble: 1
Test "Real part of: csqrt (0x1p-147 + 0x1p-147 i) == 8.225610928685557596194006925540350401606e-23 + 3.407159605465907500737319471202779419102e-23 i":
double: 1
idouble: 1
@@ -1391,8 +1732,8 @@
# ctan_towardzero
Test "Real part of: ctan_towardzero (0x1.921fb54442d18p+0 + 0x1p-1074 i) == 1.633123935319536975596773704152891653086e16 + 1.317719414943508315995636961402669067843e-291 i":
+ildouble: 4
ldouble: 4
-ildouble: 4
Test "Imaginary part of: ctan_towardzero (0x1.921fb54442d18p+0 + 0x1p-1074 i) == 1.633123935319536975596773704152891653086e16 + 1.317719414943508315995636961402669067843e-291 i":
ildouble: 13
ldouble: 13
@@ -1435,9 +1776,8 @@
Test "Real part of: ctanh (-2 - 3 i) == -0.965385879022133124278480269394560686 + 0.988437503832249372031403430350121098e-2 i":
double: 1
float: 2
-idouble: 1
-ifloat: 2
-idouble: 2
+idouble: 2
+ifloat: 2
ildouble: 2
ldouble: 2
Test "Imaginary part of: ctanh (-2 - 3 i) == -0.965385879022133124278480269394560686 + 0.988437503832249372031403430350121098e-2 i":
@@ -1469,8 +1809,8 @@
ildouble: 1
ldouble: 1
Test "Imaginary part of: ctanh (1 + 0x1p1023 i) == 0.8786063118883068695462540226219865087189 - 0.2254627924997545057926782581695274244229 i":
-idouble: 1
-double: 1
+double: 1
+idouble: 1
Test "Real part of: ctanh (1 + 0x1p127 i) == 0.9101334047676183761532873794426475906201 + 0.2446359391192790896381501310437708987204 i":
double: 1
float: 1
@@ -2114,6 +2454,12 @@
ifloat: 1
# sincos
+Test "sincos (0x1p+120, &sin_res, &cos_res) puts -9.25879022854837867303861764107414946730833e-01 in cos_res":
+float: 1
+ifloat: 1
+Test "sincos (0x1p+127, &sin_res, &cos_res) puts 7.81914638714960072263910298466369236613162e-01 in cos_res":
+float: 1
+ifloat: 1
Test "sincos (M_PI_6l*2.0, &sin_res, &cos_res) puts 0.5 in cos_res":
double: 1
float: 1
@@ -2185,6 +2531,60 @@
idouble: 1
# tan
+Test "tan (-0xc.908p-4) == -0.9997603425502441410973077452249560802034":
+ildouble: 2
+ldouble: 2
+Test "tan (-0xc.90cp-4) == -0.9998823910588060302788513970802357770031":
+ildouble: 2
+ldouble: 2
+Test "tan (-0xc.90ep-4) == -0.9999434208994808753305784795924711152508":
+ildouble: 2
+ldouble: 2
+Test "tan (-0xc.90f8p-4) == -0.9999891957244072765118898375645469865764":
+ildouble: 2
+ldouble: 2
+Test "tan (-0xc.90fcp-4) == -0.9999968250656122402859679132395522927393":
+ildouble: 1
+ldouble: 1
+Test "tan (-0xc.90fd8p-4) == -0.9999996860835706212861509874451585282616":
+ildouble: 1
+ldouble: 1
+Test "tan (-0xc.90fdap-4) == -0.9999999245021033010474530133665235922808":
+ildouble: 1
+ldouble: 1
+Test "tan (-0xc.92p-4) == -1.0004928571392300571266638743539017593717":
+ildouble: 1
+ldouble: 1
+Test "tan (-0xc.9p-4) == -0.9995162902115457818029468900654150261381":
+ildouble: 1
+ldouble: 1
+Test "tan (0xc.908p-4) == 0.9997603425502441410973077452249560802034":
+ildouble: 2
+ldouble: 2
+Test "tan (0xc.90cp-4) == 0.9998823910588060302788513970802357770031":
+ildouble: 2
+ldouble: 2
+Test "tan (0xc.90ep-4) == 0.9999434208994808753305784795924711152508":
+ildouble: 2
+ldouble: 2
+Test "tan (0xc.90f8p-4) == 0.9999891957244072765118898375645469865764":
+ildouble: 2
+ldouble: 2
+Test "tan (0xc.90fcp-4) == 0.9999968250656122402859679132395522927393":
+ildouble: 1
+ldouble: 1
+Test "tan (0xc.90fd8p-4) == 0.9999996860835706212861509874451585282616":
+ildouble: 1
+ldouble: 1
+Test "tan (0xc.90fdap-4) == 0.9999999245021033010474530133665235922808":
+ildouble: 1
+ldouble: 1
+Test "tan (0xc.92p-4) == 1.0004928571392300571266638743539017593717":
+ildouble: 1
+ldouble: 1
+Test "tan (0xc.9p-4) == 0.9995162902115457818029468900654150261381":
+ildouble: 1
+ldouble: 1
Test "tan (pi/4) == 1":
double: 1
idouble: 1
@@ -2721,32 +3121,32 @@
float: 2
idouble: 1
ifloat: 2
-ildouble: 2
-ldouble: 2
+ildouble: 1
+ldouble: 1
Function: Imaginary part of "clog":
double: 1
float: 3
idouble: 1
ifloat: 3
-ildouble: 1
-ldouble: 1
+ildouble: 2
+ldouble: 2
Function: Real part of "clog10":
-double: 1
-float: 2
-idouble: 1
-ifloat: 2
-ildouble: 3
-ldouble: 3
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+ildouble: 2
+ldouble: 2
Function: Imaginary part of "clog10":
double: 1
float: 1
idouble: 1
ifloat: 1
-ildouble: 1
-ldouble: 1
+ildouble: 2
+ldouble: 2
Function: "cos":
double: 2
@@ -2809,8 +3209,8 @@
float: 5
idouble: 2
ifloat: 5
-ildouble: 2
-ldouble: 2
+ildouble: 4
+ldouble: 4
Function: Imaginary part of "cpow":
double: 2
@@ -3223,8 +3623,8 @@
Function: "tan":
double: 1
idouble: 1
-ildouble: 1
-ldouble: 1
+ildouble: 2
+ldouble: 2
Function: "tan_downward":
float: 1
Modified: fsf/trunk/libc/sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/nptl/libc.abilist
==============================================================================
--- fsf/trunk/libc/sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/nptl/libc.abilist (original)
+++ fsf/trunk/libc/sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/nptl/libc.abilist Thu Nov 1 00:01:46 2012
@@ -1774,13 +1774,13 @@
timespec_get F
GLIBC_2.17
GLIBC_2.17 A
+ __ppc_get_timebase_freq F
clock_getcpuclockid F
clock_getres F
clock_gettime F
clock_nanosleep F
clock_settime F
secure_getenv F
- __ppc_get_timebase_freq F
GLIBC_2.2
GLIBC_2.2 A
_IO_adjust_wcolumn F
Modified: fsf/trunk/libc/sysdeps/unix/sysv/linux/powerpc/powerpc64/nptl/libc.abilist
==============================================================================
--- fsf/trunk/libc/sysdeps/unix/sysv/linux/powerpc/powerpc64/nptl/libc.abilist (original)
+++ fsf/trunk/libc/sysdeps/unix/sysv/linux/powerpc/powerpc64/nptl/libc.abilist Thu Nov 1 00:01:46 2012
@@ -80,13 +80,13 @@
timespec_get F
GLIBC_2.17
GLIBC_2.17 A
+ __ppc_get_timebase_freq F
clock_getcpuclockid F
clock_getres F
clock_gettime F
clock_nanosleep F
clock_settime F
secure_getenv F
- __ppc_get_timebase_freq F
GLIBC_2.3
GLIBC_2.3 A
_Exit F
Added: fsf/trunk/libc/sysdeps/x86/tininess.h
==============================================================================
--- fsf/trunk/libc/sysdeps/x86/tininess.h (added)
+++ fsf/trunk/libc/sysdeps/x86/tininess.h Thu Nov 1 00:01:46 2012
@@ -1,0 +1,1 @@
+#define TININESS_AFTER_ROUNDING 1
Removed: fsf/trunk/libc/sysdeps/x86_64/tininess.h
==============================================================================
--- fsf/trunk/libc/sysdeps/x86_64/tininess.h (original)
+++ fsf/trunk/libc/sysdeps/x86_64/tininess.h (removed)
@@ -1,1 +1,0 @@
-#define TININESS_AFTER_ROUNDING 1
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