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[Commits] r22476 - in /fsf/trunk/libc: ./ elf/ manual/ ports/ ports/sysdeps/mips/bits/ ports/sysdeps/unix/sysv/linux/mips/mips32/nptl/...
- To: commits@xxxxxxxxxx
- Subject: [Commits] r22476 - in /fsf/trunk/libc: ./ elf/ manual/ ports/ ports/sysdeps/mips/bits/ ports/sysdeps/unix/sysv/linux/mips/mips32/nptl/...
- From: eglibc@xxxxxxxxxx
- Date: Thu, 21 Feb 2013 00:01:56 -0000
Author: eglibc
Date: Thu Feb 21 00:01:54 2013
New Revision: 22476
Log:
Import glibc-mainline for 2013-02-21
Modified:
fsf/trunk/libc/ChangeLog
fsf/trunk/libc/elf/elf.h
fsf/trunk/libc/manual/nss.texi
fsf/trunk/libc/ports/ChangeLog.mips
fsf/trunk/libc/ports/sysdeps/mips/bits/nan.h
fsf/trunk/libc/ports/sysdeps/unix/sysv/linux/mips/mips32/nptl/libc.abilist
fsf/trunk/libc/sysdeps/ieee754/bits/nan.h
fsf/trunk/libc/sysdeps/ieee754/dbl-64/mpa.c
fsf/trunk/libc/sysdeps/powerpc/powerpc32/power4/fpu/mpa.c
fsf/trunk/libc/sysdeps/powerpc/powerpc64/power4/fpu/mpa.c
Modified: fsf/trunk/libc/ChangeLog
==============================================================================
--- fsf/trunk/libc/ChangeLog (original)
+++ fsf/trunk/libc/ChangeLog Thu Feb 21 00:01:54 2013
@@ -1,3 +1,74 @@
+2013-02-20 Carlos O'Donell <carlos@xxxxxxxxxx>
+
+ * manual/nss.texi (System Databases and Name Service Switch):
+ Remove frobnicate @pxref.
+
+2013-02-20 Thomas Schwinge <thomas@xxxxxxxxxxxxxxxx>
+
+ * sysdeps/ieee754/bits/nan.h [!__GNUC__] (__nan_union): Change
+ __attribute__ ((unused)) to __attribute__ ((__unused__)).
+
+2013-02-20 Petr Machata <pmachata@xxxxxxxxxx>
+
+ * elf/elf.h (R_ARM_TARGET1): New macro.
+ (R_ARM_SBREL31, R_ARM_V4BX, R_ARM_TARGET2): Likewise.
+ (R_ARM_PREL31, R_ARM_MOVW_ABS_NC, R_ARM_MOVT_ABS): Likewise.
+ (R_ARM_MOVW_PREL_NC, R_ARM_MOVT_PREL): Likewise.
+ (R_ARM_THM_MOVW_ABS_NC, R_ARM_THM_MOVT_ABS): Likewise.
+ (R_ARM_THM_MOVW_PREL_NC, R_ARM_THM_MOVT_PREL): Likewise.
+ (R_ARM_THM_JUMP19, R_ARM_THM_JUMP6): Likewise.
+ (R_ARM_THM_ALU_PREL_11_0, R_ARM_THM_PC12): Likewise.
+ (R_ARM_ABS32_NOI, R_ARM_REL32_NOI): Likewise.
+ (R_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0): Likewise.
+ (R_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1): Likewise.
+ (R_ARM_ALU_PC_G2, R_ARM_LDR_PC_G1, R_ARM_LDR_PC_G2): Likewise.
+ (R_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G1): Likewise.
+ (R_ARM_LDRS_PC_G2, R_ARM_LDC_PC_G0): Likewise.
+ (R_ARM_LDC_PC_G1, R_ARM_LDC_PC_G2): Likewise.
+ (R_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0): Likewise.
+ (R_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1): Likewise.
+ (R_ARM_ALU_SB_G2, R_ARM_LDR_SB_G0, R_ARM_LDR_SB_G1): Likewise.
+ (R_ARM_LDR_SB_G2, R_ARM_LDRS_SB_G0): Likewise.
+ (R_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G2): Likewise.
+ (R_ARM_LDC_SB_G0, R_ARM_LDC_SB_G1, R_ARM_LDC_SB_G2): Likewise.
+ (R_ARM_MOVW_BREL_NC, R_ARM_MOVT_BREL): Likewise.
+ (R_ARM_MOVW_BREL, R_ARM_THM_MOVW_BREL_NC): Likewise.
+ (R_ARM_THM_MOVT_BREL, R_ARM_THM_MOVW_BREL): Likewise.
+ (R_ARM_PLT32_ABS, R_ARM_GOT_ABS, R_ARM_GOT_PREL): Likewise.
+ (R_ARM_GOT_BREL12, R_ARM_GOTOFF12, R_ARM_GOTRELAX): Likewise.
+ (R_ARM_TLS_LDO12, R_ARM_TLS_LE12, R_ARM_TLS_IE12GP): Likewise.
+ (R_ARM_PRIVATE_0, R_ARM_PRIVATE_1, R_ARM_PRIVATE_2): Likewise.
+ (R_ARM_PRIVATE_3, R_ARM_PRIVATE_4, R_ARM_PRIVATE_5): Likewise.
+ (R_ARM_PRIVATE_6, R_ARM_PRIVATE_7, R_ARM_PRIVATE_8): Likewise.
+ (R_ARM_PRIVATE_9, R_ARM_PRIVATE_10): Likewise.
+ (R_ARM_PRIVATE_11, R_ARM_PRIVATE_12): Likewise.
+ (R_ARM_PRIVATE_13, R_ARM_PRIVATE_14): Likewise.
+ (R_ARM_PRIVATE_15, R_ARM_ME_TOO): Likewise.
+ (R_ARM_THM_TLS_DESCSEQ16, R_ARM_THM_TLS_DESCSEQ32): Likewise.
+ (R_ARM_THM_GOT_BREL12): Likewise.
+ (R_ARM_PC24, R_ARM_PLT32): Updated a comment at this macro.
+ (R_ARM_THM_PC11, R_ARM_THM_PC9): Likewise.
+ (R_ARM_THM_ABS5, R_ARM_THM_PC22): Added a comment to this macro.
+ (R_ARM_THM_PC8, R_ARM_THM_SWI8, R_ARM_XPC25): Likewise.
+ (R_ARM_THM_XPC22, R_ARM_ALU_PCREL_7_0): Likewise.
+ (R_ARM_ALU_PCREL_15_8, R_ARM_ALU_PCREL_23_15): Likewise.
+ (R_ARM_LDR_SBREL_11_0, R_ARM_ALU_SBREL_19_12): Likewise.
+ (R_ARM_ALU_SBREL_27_20, R_ARM_TLS_DESCSEQ): Likewise.
+ (R_ARM_THM_TLS_DESCSEQ): Fixed whitespace.
+
+2013-02-20 Thomas Schwinge <thomas@xxxxxxxxxxxxxxxx>
+
+ * sysdeps/ieee754/bits/nan.h [!__GNUC__] (__nan_union): Change
+ __attribute_used__ to __attribute__ ((unused)).
+
+2013-02-20 Siddhesh Poyarekar <siddhesh@xxxxxxxxxx>
+
+ * sysdeps/ieee754/dbl-64/mpa.c (__sqr): Copy over comment from
+ powerpc mpa.c.
+ * sysdeps/powerpc/powerpc32/power4/fpu/mpa.c (__mul): Fix
+ comment formatting.
+ * sysdeps/powerpc/powerpc64/power4/fpu/mpa.c (__mul): Likewise.
+
2013-02-19 Joseph Myers <joseph@xxxxxxxxxxxxxxxx>
[BZ #13550]
Modified: fsf/trunk/libc/elf/elf.h
==============================================================================
--- fsf/trunk/libc/elf/elf.h (original)
+++ fsf/trunk/libc/elf/elf.h Thu Feb 21 00:01:54 2013
@@ -2343,23 +2343,25 @@
/* ARM relocs. */
#define R_ARM_NONE 0 /* No reloc */
-#define R_ARM_PC24 1 /* PC relative 26 bit branch */
+#define R_ARM_PC24 1 /* Deprecated PC relative 26
+ bit branch. */
#define R_ARM_ABS32 2 /* Direct 32 bit */
#define R_ARM_REL32 3 /* PC relative 32 bit */
#define R_ARM_PC13 4
#define R_ARM_ABS16 5 /* Direct 16 bit */
#define R_ARM_ABS12 6 /* Direct 12 bit */
-#define R_ARM_THM_ABS5 7
+#define R_ARM_THM_ABS5 7 /* Direct & 0x7C (LDR, STR). */
#define R_ARM_ABS8 8 /* Direct 8 bit */
#define R_ARM_SBREL32 9
-#define R_ARM_THM_PC22 10
-#define R_ARM_THM_PC8 11
+#define R_ARM_THM_PC22 10 /* PC relative 24 bit (Thumb32 BL). */
+#define R_ARM_THM_PC8 11 /* PC relative & 0x3FC
+ (Thumb16 LDR, ADD, ADR). */
#define R_ARM_AMP_VCALL9 12
#define R_ARM_SWI24 13 /* Obsolete static relocation. */
#define R_ARM_TLS_DESC 13 /* Dynamic relocation. */
-#define R_ARM_THM_SWI8 14
-#define R_ARM_XPC25 15
-#define R_ARM_THM_XPC22 16
+#define R_ARM_THM_SWI8 14 /* Reserved. */
+#define R_ARM_XPC25 15 /* Reserved. */
+#define R_ARM_THM_XPC22 16 /* Reserved. */
#define R_ARM_TLS_DTPMOD32 17 /* ID of module containing symbol */
#define R_ARM_TLS_DTPOFF32 18 /* Offset in TLS block */
#define R_ARM_TLS_TPOFF32 19 /* Offset in static TLS block */
@@ -2370,21 +2372,109 @@
#define R_ARM_GOTOFF 24 /* 32 bit offset to GOT */
#define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */
#define R_ARM_GOT32 26 /* 32 bit GOT entry */
-#define R_ARM_PLT32 27 /* 32 bit PLT address */
-#define R_ARM_ALU_PCREL_7_0 32
-#define R_ARM_ALU_PCREL_15_8 33
-#define R_ARM_ALU_PCREL_23_15 34
-#define R_ARM_LDR_SBREL_11_0 35
-#define R_ARM_ALU_SBREL_19_12 36
-#define R_ARM_ALU_SBREL_27_20 37
+#define R_ARM_PLT32 27 /* Deprecated, 32 bit PLT address. */
+#define R_ARM_CALL 28 /* PC relative 24 bit (BL, BLX). */
+#define R_ARM_JUMP24 29 /* PC relative 24 bit
+ (B, BL<cond>). */
+#define R_ARM_THM_JUMP24 30 /* PC relative 24 bit (Thumb32 B.W). */
+#define R_ARM_BASE_ABS 31 /* Adjust by program base. */
+#define R_ARM_ALU_PCREL_7_0 32 /* Obsolete. */
+#define R_ARM_ALU_PCREL_15_8 33 /* Obsolete. */
+#define R_ARM_ALU_PCREL_23_15 34 /* Obsolete. */
+#define R_ARM_LDR_SBREL_11_0 35 /* Deprecated, prog. base relative. */
+#define R_ARM_ALU_SBREL_19_12 36 /* Deprecated, prog. base relative. */
+#define R_ARM_ALU_SBREL_27_20 37 /* Deprecated, prog. base relative. */
+#define R_ARM_TARGET1 38
+#define R_ARM_SBREL31 39 /* Program base relative. */
+#define R_ARM_V4BX 40
+#define R_ARM_TARGET2 41
+#define R_ARM_PREL31 42 /* 32 bit PC relative. */
+#define R_ARM_MOVW_ABS_NC 43 /* Direct 16-bit (MOVW). */
+#define R_ARM_MOVT_ABS 44 /* Direct high 16-bit (MOVT). */
+#define R_ARM_MOVW_PREL_NC 45 /* PC relative 16-bit (MOVW). */
+#define R_ARM_MOVT_PREL 46 /* PC relative (MOVT). */
+#define R_ARM_THM_MOVW_ABS_NC 47 /* Direct 16 bit (Thumb32 MOVW). */
+#define R_ARM_THM_MOVT_ABS 48 /* Direct high 16 bit
+ (Thumb32 MOVT). */
+#define R_ARM_THM_MOVW_PREL_NC 49 /* PC relative 16 bit
+ (Thumb32 MOVW). */
+#define R_ARM_THM_MOVT_PREL 50 /* PC relative high 16 bit
+ (Thumb32 MOVT). */
+#define R_ARM_THM_JUMP19 51 /* PC relative 20 bit
+ (Thumb32 B<cond>.W). */
+#define R_ARM_THM_JUMP6 52 /* PC relative X & 0x7E
+ (Thumb16 CBZ, CBNZ). */
+#define R_ARM_THM_ALU_PREL_11_0 53 /* PC relative 12 bit
+ (Thumb32 ADR.W). */
+#define R_ARM_THM_PC12 54 /* PC relative 12 bit
+ (Thumb32 LDR{D,SB,H,SH}). */
+#define R_ARM_ABS32_NOI 55 /* Direct 32-bit. */
+#define R_ARM_REL32_NOI 56 /* PC relative 32-bit. */
+#define R_ARM_ALU_PC_G0_NC 57 /* PC relative (ADD, SUB). */
+#define R_ARM_ALU_PC_G0 58 /* PC relative (ADD, SUB). */
+#define R_ARM_ALU_PC_G1_NC 59 /* PC relative (ADD, SUB). */
+#define R_ARM_ALU_PC_G1 60 /* PC relative (ADD, SUB). */
+#define R_ARM_ALU_PC_G2 61 /* PC relative (ADD, SUB). */
+#define R_ARM_LDR_PC_G1 62 /* PC relative (LDR,STR,LDRB,STRB). */
+#define R_ARM_LDR_PC_G2 63 /* PC relative (LDR,STR,LDRB,STRB). */
+#define R_ARM_LDRS_PC_G0 64 /* PC relative (STR{D,H},
+ LDR{D,SB,H,SH}). */
+#define R_ARM_LDRS_PC_G1 65 /* PC relative (STR{D,H},
+ LDR{D,SB,H,SH}). */
+#define R_ARM_LDRS_PC_G2 66 /* PC relative (STR{D,H},
+ LDR{D,SB,H,SH}). */
+#define R_ARM_LDC_PC_G0 67 /* PC relative (LDC, STC). */
+#define R_ARM_LDC_PC_G1 68 /* PC relative (LDC, STC). */
+#define R_ARM_LDC_PC_G2 69 /* PC relative (LDC, STC). */
+#define R_ARM_ALU_SB_G0_NC 70 /* Program base relative (ADD,SUB). */
+#define R_ARM_ALU_SB_G0 71 /* Program base relative (ADD,SUB). */
+#define R_ARM_ALU_SB_G1_NC 72 /* Program base relative (ADD,SUB). */
+#define R_ARM_ALU_SB_G1 73 /* Program base relative (ADD,SUB). */
+#define R_ARM_ALU_SB_G2 74 /* Program base relative (ADD,SUB). */
+#define R_ARM_LDR_SB_G0 75 /* Program base relative (LDR,
+ STR, LDRB, STRB). */
+#define R_ARM_LDR_SB_G1 76 /* Program base relative
+ (LDR, STR, LDRB, STRB). */
+#define R_ARM_LDR_SB_G2 77 /* Program base relative
+ (LDR, STR, LDRB, STRB). */
+#define R_ARM_LDRS_SB_G0 78 /* Program base relative
+ (LDR, STR, LDRB, STRB). */
+#define R_ARM_LDRS_SB_G1 79 /* Program base relative
+ (LDR, STR, LDRB, STRB). */
+#define R_ARM_LDRS_SB_G2 80 /* Program base relative
+ (LDR, STR, LDRB, STRB). */
+#define R_ARM_LDC_SB_G0 81 /* Program base relative (LDC,STC). */
+#define R_ARM_LDC_SB_G1 82 /* Program base relative (LDC,STC). */
+#define R_ARM_LDC_SB_G2 83 /* Program base relative (LDC,STC). */
+#define R_ARM_MOVW_BREL_NC 84 /* Program base relative 16
+ bit (MOVW). */
+#define R_ARM_MOVT_BREL 85 /* Program base relative high
+ 16 bit (MOVT). */
+#define R_ARM_MOVW_BREL 86 /* Program base relative 16
+ bit (MOVW). */
+#define R_ARM_THM_MOVW_BREL_NC 87 /* Program base relative 16
+ bit (Thumb32 MOVW). */
+#define R_ARM_THM_MOVT_BREL 88 /* Program base relative high
+ 16 bit (Thumb32 MOVT). */
+#define R_ARM_THM_MOVW_BREL 89 /* Program base relative 16
+ bit (Thumb32 MOVW). */
#define R_ARM_TLS_GOTDESC 90
#define R_ARM_TLS_CALL 91
-#define R_ARM_TLS_DESCSEQ 92
+#define R_ARM_TLS_DESCSEQ 92 /* TLS relaxation. */
#define R_ARM_THM_TLS_CALL 93
+#define R_ARM_PLT32_ABS 94
+#define R_ARM_GOT_ABS 95 /* GOT entry. */
+#define R_ARM_GOT_PREL 96 /* PC relative GOT entry. */
+#define R_ARM_GOT_BREL12 97 /* GOT entry relative to GOT
+ origin (LDR). */
+#define R_ARM_GOTOFF12 98 /* 12 bit, GOT entry relative
+ to GOT origin (LDR, STR). */
+#define R_ARM_GOTRELAX 99
#define R_ARM_GNU_VTENTRY 100
#define R_ARM_GNU_VTINHERIT 101
-#define R_ARM_THM_PC11 102 /* thumb unconditional branch */
-#define R_ARM_THM_PC9 103 /* thumb conditional branch */
+#define R_ARM_THM_PC11 102 /* PC relative & 0xFFE (Thumb16 B). */
+#define R_ARM_THM_PC9 103 /* PC relative & 0x1FE
+ (Thumb16 B/B<cond>). */
#define R_ARM_TLS_GD32 104 /* PC-rel 32 bit for global dynamic
thread local data */
#define R_ARM_TLS_LDM32 105 /* PC-rel 32 bit for local dynamic
@@ -2395,7 +2485,18 @@
static TLS block offset */
#define R_ARM_TLS_LE32 108 /* 32 bit offset relative to static
TLS block */
-#define R_ARM_THM_TLS_DESCSEQ 129
+#define R_ARM_TLS_LDO12 109 /* 12 bit relative to TLS
+ block (LDR, STR). */
+#define R_ARM_TLS_LE12 110 /* 12 bit relative to static
+ TLS block (LDR, STR). */
+#define R_ARM_TLS_IE12GP 111 /* 12 bit GOT entry relative
+ to GOT origin (LDR). */
+#define R_ARM_ME_TOO 128 /* Obsolete. */
+#define R_ARM_THM_TLS_DESCSEQ 129
+#define R_ARM_THM_TLS_DESCSEQ16 129
+#define R_ARM_THM_TLS_DESCSEQ32 130
+#define R_ARM_THM_GOT_BREL12 131 /* GOT entry relative to GOT
+ origin, 12 bit (Thumb32 LDR). */
#define R_ARM_IRELATIVE 160
#define R_ARM_RXPC25 249
#define R_ARM_RSBREL32 250
Modified: fsf/trunk/libc/manual/nss.texi
==============================================================================
--- fsf/trunk/libc/manual/nss.texi (original)
+++ fsf/trunk/libc/manual/nss.texi Thu Feb 21 00:01:54 2013
@@ -10,7 +10,7 @@
using files (e.g., @file{/etc/passwd}), but other nameservices (like the
Network Information Service (NIS) and the Domain Name Service (DNS))
became popular, and were hacked into the C library, usually with a fixed
-search order (@pxref{frobnicate, , ,jargon, The Jargon File}).
+search order.
@Theglibc{} contains a cleaner solution of this problem. It is
designed after a method used by Sun Microsystems in the C library of
Modified: fsf/trunk/libc/ports/ChangeLog.mips
==============================================================================
--- fsf/trunk/libc/ports/ChangeLog.mips (original)
+++ fsf/trunk/libc/ports/ChangeLog.mips Thu Feb 21 00:01:54 2013
@@ -1,3 +1,19 @@
+2013-02-20 Thomas Schwinge <thomas@xxxxxxxxxxxxxxxx>
+
+ * sysdeps/mips/bits/nan.h [!__GNUC__] (__nan_union): Change
+ __attribute__ ((unused)) to __attribute__ ((__unused__)).
+
+ * sysdeps/unix/sysv/linux/mips/mips32/nptl/libc.abilist: Sort
+ properly.
+
+ * sysdeps/mips/bits/nan.h [!__GNUC__] (__nan_union): Change
+ __attribute_used__ to __attribute__ ((unused)).
+
+ * sysdeps/mips/bits/nan.h [!__GNUC__] (__nan_union): Add
+ __attribute_used__.
+
+ * sysdeps/mips/bits/nan.h: Align to generic IEEE 754 file.
+
2013-02-19 Joseph Myers <joseph@xxxxxxxxxxxxxxxx>
[BZ #14920]
Modified: fsf/trunk/libc/ports/sysdeps/mips/bits/nan.h
==============================================================================
--- fsf/trunk/libc/ports/sysdeps/mips/bits/nan.h (original)
+++ fsf/trunk/libc/ports/sysdeps/mips/bits/nan.h Thu Feb 21 00:01:54 2013
@@ -1,4 +1,4 @@
-/* `NAN' constant for IEEE 754 machines.
+/* `NAN' constant for IEEE 754 machines. MIPS version.
Copyright (C) 1992-2013 Free Software Foundation, Inc.
This file is part of the GNU C Library.
@@ -13,7 +13,7 @@
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library. If not, see
+ License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#ifndef _MATH_H
@@ -21,20 +21,21 @@
#endif
-/* IEEE Not A Number (QNaN). Note that MIPS has the QNaN and SNaN patterns
- reversed compared to most other architectures. The IEEE spec left
- the definition of this open to implementations, and for MIPS the top
- bit of the mantissa must be SET to indicate a SNaN. */
+/* IEEE Not A Number. */
+/* Note that MIPS has the QNaN and SNaN patterns reversed compared to most
+ other architectures. The IEEE spec left the definition of this open to
+ implementations, and for MIPS the top bit of the mantissa must be SET to
+ indicate a SNaN. */
#if __GNUC_PREREQ(3,3)
-# define NAN (__builtin_nanf(""))
+# define NAN (__builtin_nanf (""))
#elif defined __GNUC__
# define NAN \
- (__extension__ \
- ((union { unsigned __l __attribute__((__mode__(__SI__))); float __d; }) \
+ (__extension__ \
+ ((union { unsigned __l __attribute__ ((__mode__ (__SI__))); float __d; }) \
{ __l: 0x7fbfffffUL }).__d)
#else
@@ -48,7 +49,8 @@
# define __nan_bytes { 0xff, 0xff, 0xbf, 0x7f }
# endif
-static union { unsigned char __c[4]; float __d; } __nan_union = { __nan_bytes };
+static union { unsigned char __c[4]; float __d; } __nan_union
+ __attribute__ ((__unused__)) = { __nan_bytes };
# define NAN (__nan_union.__d)
#endif /* GCC. */
Modified: fsf/trunk/libc/ports/sysdeps/unix/sysv/linux/mips/mips32/nptl/libc.abilist
==============================================================================
--- fsf/trunk/libc/ports/sysdeps/unix/sysv/linux/mips/mips32/nptl/libc.abilist (original)
+++ fsf/trunk/libc/ports/sysdeps/unix/sysv/linux/mips/mips32/nptl/libc.abilist Thu Feb 21 00:01:54 2013
@@ -1390,6 +1390,17 @@
mbrtoc16 F
mbrtoc32 F
timespec_get F
+GLIBC_2.17
+ GLIBC_2.17 A
+ clock_getcpuclockid F
+ clock_getres F
+ clock_gettime F
+ clock_nanosleep F
+ clock_settime F
+ secure_getenv F
+GLIBC_2.18
+ GLIBC_2.18 A
+ __cxa_thread_atexit_impl F
GLIBC_2.2
GLIBC_2.2 A
_Exit F
@@ -2242,14 +2253,3 @@
pipe2 F
_gp_disp
_gp_disp A
-GLIBC_2.17
- GLIBC_2.17 A
- clock_getcpuclockid F
- clock_getres F
- clock_gettime F
- clock_nanosleep F
- clock_settime F
- secure_getenv F
-GLIBC_2.18
- GLIBC_2.18 A
- __cxa_thread_atexit_impl F
Modified: fsf/trunk/libc/sysdeps/ieee754/bits/nan.h
==============================================================================
--- fsf/trunk/libc/sysdeps/ieee754/bits/nan.h (original)
+++ fsf/trunk/libc/sysdeps/ieee754/bits/nan.h Thu Feb 21 00:01:54 2013
@@ -46,7 +46,7 @@
# endif
static union { unsigned char __c[4]; float __d; } __nan_union
- __attribute_used__ = { __nan_bytes };
+ __attribute__ ((__unused__)) = { __nan_bytes };
# define NAN (__nan_union.__d)
#endif /* GCC. */
Modified: fsf/trunk/libc/sysdeps/ieee754/dbl-64/mpa.c
==============================================================================
--- fsf/trunk/libc/sysdeps/ieee754/dbl-64/mpa.c (original)
+++ fsf/trunk/libc/sysdeps/ieee754/dbl-64/mpa.c Thu Feb 21 00:01:54 2013
@@ -749,6 +749,15 @@
if (k % 2 == 0)
yk += X[lim] * X[lim];
+ /* In __mul, this loop (and the one within the next while loop) run
+ between a range to calculate the mantissa as follows:
+
+ Z[k] = X[k] * Y[n] + X[k+1] * Y[n-1] ... + X[n-1] * Y[k+1]
+ + X[n] * Y[k]
+
+ For X == Y, we can get away with summing halfway and doubling the
+ result. For cases where the range size is even, the mid-point needs
+ to be added separately (above). */
for (i = k - p, j = p; i < j; i++, j--)
yk2 += X[i] * X[j];
@@ -769,6 +778,7 @@
if (k % 2 == 0)
yk += X[lim] * X[lim];
+ /* Likewise for this loop. */
for (i = 1, j = k - 1; i < j; i++, j--)
yk2 += X[i] * X[j];
Modified: fsf/trunk/libc/sysdeps/powerpc/powerpc32/power4/fpu/mpa.c
==============================================================================
--- fsf/trunk/libc/sysdeps/powerpc/powerpc32/power4/fpu/mpa.c (original)
+++ fsf/trunk/libc/sysdeps/powerpc/powerpc32/power4/fpu/mpa.c Thu Feb 21 00:01:54 2013
@@ -598,7 +598,7 @@
long p2 = p;
double u, zk, zk2;
- /* Is z=0? */
+ /* Is z=0? */
if (X[0] * Y[0] == ZERO)
{
Z[0] = ZERO;
Modified: fsf/trunk/libc/sysdeps/powerpc/powerpc64/power4/fpu/mpa.c
==============================================================================
--- fsf/trunk/libc/sysdeps/powerpc/powerpc64/power4/fpu/mpa.c (original)
+++ fsf/trunk/libc/sysdeps/powerpc/powerpc64/power4/fpu/mpa.c Thu Feb 21 00:01:54 2013
@@ -598,7 +598,7 @@
long p2 = p;
double u, zk, zk2;
- /* Is z=0? */
+ /* Is z=0? */
if (X[0] * Y[0] == ZERO)
{
Z[0] = ZERO;
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