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[Commits] r22626 - in /fsf/trunk/libc: ./ manual/ nptl/ nptl/sysdeps/unix/sysv/linux/ ports/ ports/sysdeps/arm/ ports/sysdeps/arm/armv...
- To: commits@xxxxxxxxxx
- Subject: [Commits] r22626 - in /fsf/trunk/libc: ./ manual/ nptl/ nptl/sysdeps/unix/sysv/linux/ ports/ ports/sysdeps/arm/ ports/sysdeps/arm/armv...
- From: eglibc@xxxxxxxxxx
- Date: Thu, 14 Mar 2013 00:02:20 -0000
Author: eglibc
Date: Thu Mar 14 00:02:19 2013
New Revision: 22626
Log:
Import glibc-mainline for 2013-03-14
Modified:
fsf/trunk/libc/ChangeLog
fsf/trunk/libc/INSTALL
fsf/trunk/libc/extra-lib.mk
fsf/trunk/libc/manual/install.texi
fsf/trunk/libc/nptl/ChangeLog
fsf/trunk/libc/nptl/sysdeps/unix/sysv/linux/lowlevellock.c
fsf/trunk/libc/ports/ChangeLog.arm
fsf/trunk/libc/ports/sysdeps/arm/add_n.S
fsf/trunk/libc/ports/sysdeps/arm/arm-features.h
fsf/trunk/libc/ports/sysdeps/arm/armv6t2/memchr.S
fsf/trunk/libc/ports/sysdeps/arm/memcpy.S
fsf/trunk/libc/ports/sysdeps/arm/memmove.S
fsf/trunk/libc/timezone/zic.c
Modified: fsf/trunk/libc/ChangeLog
==============================================================================
--- fsf/trunk/libc/ChangeLog (original)
+++ fsf/trunk/libc/ChangeLog Thu Mar 14 00:02:19 2013
@@ -1,3 +1,18 @@
+2013-03-13 Andreas Schwab <schwab@xxxxxxx>
+
+ * extra-lib.mk (extra-objs): Add static-only-routines as .oS
+ instead of .os.
+
+2013-03-13 Joseph Myers <joseph@xxxxxxxxxxxxxxxx>
+
+ * timezone/zic.c: Update from tzcode 2013b.
+
+2013-03-12 Carlos O'Donell <carlos@xxxxxxxxxx>
+
+ * manual/install.texi (Configuring and compiling):
+ Mention i686 and i586.
+ * INSTALL: Regenerate.
+
2013-03-12 Roland McGrath <roland@xxxxxxxxxxxxx>
* sysdeps/init_array/elf-init.c: New file.
Modified: fsf/trunk/libc/INSTALL
==============================================================================
--- fsf/trunk/libc/INSTALL (original)
+++ fsf/trunk/libc/INSTALL Thu Mar 14 00:02:19 2013
@@ -128,6 +128,11 @@
this can be prevented though there generally is no reason since it
creates compatibility problems.
+`--enable-hardcoded-path-in-tests'
+ By default, dynamic tests are linked to run with the installed C
+ library. This option hardcodes the newly built C library path in
+ dynamic tests so that they can be invoked directly.
+
`--build=BUILD-SYSTEM'
`--host=HOST-SYSTEM'
These options are for cross-compiling. If you specify both
@@ -141,9 +146,9 @@
native compile but use what you specify instead of guessing what
your system is. This is most useful to change the CPU submodel.
For example, if `configure' guesses your machine as
- `i586-pc-linux-gnu' but you want to compile a library for 386es,
- give `--host=i386-pc-linux-gnu' or just `--host=i386-linux' and add
- the appropriate compiler flags (`-mcpu=i386' will do the trick) to
+ `i686-pc-linux-gnu' but you want to compile a library for 586es,
+ give `--host=i586-pc-linux-gnu' or just `--host=i586-linux' and add
+ the appropriate compiler flags (`-mcpu=i586' will do the trick) to
CFLAGS.
If you specify just `--build', `configure' will get confused.
Modified: fsf/trunk/libc/extra-lib.mk
==============================================================================
--- fsf/trunk/libc/extra-lib.mk (original)
+++ fsf/trunk/libc/extra-lib.mk Thu Mar 14 00:02:19 2013
@@ -34,7 +34,12 @@
$($(lib)-shared-only-routines),\
$(all-$(lib)-routines))))
ifneq (,$(filter .os,$(object-suffixes-$(lib))))
-extra-objs += $(all-$(lib)-routines:%=%.os)
+extra-objs += $(patsubst %,%.os,$(filter-out $($(lib)-static-only-routines),\
+ $(all-$(lib)-routines)))
+endif
+ifneq (,$(filter .oS,$(object-suffixes-$(lib))))
+extra-objs += $(patsubst %,%.oS,$(filter $($(lib)-static-only-routines),\
+ $(all-$(lib)-routines)))
endif
alltypes-$(lib) := $(foreach o,$(object-suffixes-$(lib)),\
$(objpfx)$(patsubst %,$(libtype$o),\
Modified: fsf/trunk/libc/manual/install.texi
==============================================================================
--- fsf/trunk/libc/manual/install.texi (original)
+++ fsf/trunk/libc/manual/install.texi Thu Mar 14 00:02:19 2013
@@ -172,10 +172,10 @@
If you only specify @samp{--host}, @code{configure} will prepare for a
native compile but use what you specify instead of guessing what your
system is. This is most useful to change the CPU submodel. For example,
-if @code{configure} guesses your machine as @code{i586-pc-linux-gnu} but
-you want to compile a library for 386es, give
-@samp{--host=i386-pc-linux-gnu} or just @samp{--host=i386-linux} and add
-the appropriate compiler flags (@samp{-mcpu=i386} will do the trick) to
+if @code{configure} guesses your machine as @code{i686-pc-linux-gnu} but
+you want to compile a library for 586es, give
+@samp{--host=i586-pc-linux-gnu} or just @samp{--host=i586-linux} and add
+the appropriate compiler flags (@samp{-mcpu=i586} will do the trick) to
@var{CFLAGS}.
If you specify just @samp{--build}, @code{configure} will get confused.
Modified: fsf/trunk/libc/nptl/ChangeLog
==============================================================================
--- fsf/trunk/libc/nptl/ChangeLog (original)
+++ fsf/trunk/libc/nptl/ChangeLog Thu Mar 14 00:02:19 2013
@@ -1,3 +1,7 @@
+2013-03-12 Carlos O'Donell <carlos@xxxxxxxxxx>
+
+ * sysdeps/unix/sysv/linux/lowlevellock.c: Include <atomic.h>.
+
2013-03-04 Roland McGrath <roland@xxxxxxxxxxxxx>
* sysdeps/unix/sysv/linux/i386/i686/dl-sysdep.h:
Modified: fsf/trunk/libc/nptl/sysdeps/unix/sysv/linux/lowlevellock.c
==============================================================================
--- fsf/trunk/libc/nptl/sysdeps/unix/sysv/linux/lowlevellock.c (original)
+++ fsf/trunk/libc/nptl/sysdeps/unix/sysv/linux/lowlevellock.c Thu Mar 14 00:02:19 2013
@@ -21,7 +21,7 @@
#include <sysdep.h>
#include <lowlevellock.h>
#include <sys/time.h>
-
+#include <atomic.h>
void
__lll_lock_wait_private (int *futex)
Modified: fsf/trunk/libc/ports/ChangeLog.arm
==============================================================================
--- fsf/trunk/libc/ports/ChangeLog.arm (original)
+++ fsf/trunk/libc/ports/ChangeLog.arm Thu Mar 14 00:02:19 2013
@@ -1,3 +1,25 @@
+2013-03-13 Roland McGrath <roland@xxxxxxxxxxxxx>
+
+ * sysdeps/arm/arm-features.h (ARM_BX_ALIGN_LOG2): New macro.
+ * sysdeps/arm/memcpy.S: Respect ARM_BX_ALIGN_LOG2.
+ * sysdeps/arm/memmove.S: Likewise.
+
+ * sysdeps/arm/add_n.S: Include <arm-features.h>.
+ [ARM_ALWAYS_BX]: Don't pop into pc.
+
+ * sysdeps/arm/arm-features.h: Add comment about ARM_ALWAYS_BX.
+ * sysdeps/arm/memcpy.S: Include <arm-features.h>.
+ [ARM_ALWAYS_BX]: Avoid pc as destination.
+ * sysdeps/arm/memmove.S: Likewise.
+
+2013-03-12 Roland McGrath <roland@xxxxxxxxxxxxx>
+
+ * sysdeps/arm/armv6t2/memchr.S [NO_THUMB]:
+ Use .arm rather than .thumb, .thumb_func. Avoid cbz/cnbz instructions.
+
+ * sysdeps/arm/armv6t2/memchr.S: Change register allocation so ldrd use
+ is r4,r5 rather than r5,r6; this way ARM mode will allow that ldrd.
+
2013-03-11 Joseph Myers <joseph@xxxxxxxxxxxxxxxx>
* sysdeps/arm/preconfigure.in: Add comment about
Modified: fsf/trunk/libc/ports/sysdeps/arm/add_n.S
==============================================================================
--- fsf/trunk/libc/ports/sysdeps/arm/add_n.S (original)
+++ fsf/trunk/libc/ports/sysdeps/arm/add_n.S Thu Mar 14 00:02:19 2013
@@ -17,6 +17,7 @@
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
+#include <arm-features.h>
.syntax unified
.text
@@ -80,5 +81,10 @@
9:
RETC /* copy carry out */
+#ifndef ARM_ALWAYS_BX
pop { r4, r5, r6, r7, r8, r10, pc }
+#else
+ pop { r4, r5, r6, r7, r8, r10, lr }
+ bx lr
+#endif
END (FUNC)
Modified: fsf/trunk/libc/ports/sysdeps/arm/arm-features.h
==============================================================================
--- fsf/trunk/libc/ports/sysdeps/arm/arm-features.h (original)
+++ fsf/trunk/libc/ports/sysdeps/arm/arm-features.h Thu Mar 14 00:02:19 2013
@@ -36,4 +36,21 @@
at runtime (or that we never care about its state) and so need not
be checked for. */
+/* A more-specific arm-features.h file may define ARM_ALWAYS_BX to indicate
+ that instructions using pc as a destination register must never be used,
+ so a "bx" (or "blx") instruction is always required. */
+
+/* The log2 of the minimum alignment required for an address that
+ is the target of a computed branch (i.e. a "bx" instruction).
+ A more-specific arm-features.h file may define this to set a more
+ stringent requirement.
+
+ Using this only makes sense for code in ARM mode (where instructions
+ always have a fixed size of four bytes), or for Thumb-mode code that is
+ specifically aligning all the related branch targets to match (since
+ Thumb instructions might be either two or four bytes). */
+#ifndef ARM_BX_ALIGN_LOG2
+# define ARM_BX_ALIGN_LOG2 2
+#endif
+
#endif /* arm-features.h */
Modified: fsf/trunk/libc/ports/sysdeps/arm/armv6t2/memchr.S
==============================================================================
--- fsf/trunk/libc/ports/sysdeps/arm/armv6t2/memchr.S (original)
+++ fsf/trunk/libc/ports/sysdeps/arm/armv6t2/memchr.S Thu Mar 14 00:02:19 2013
@@ -42,10 +42,12 @@
.syntax unified
.text
+#ifdef NO_THUMB
+ .arm
+#else
.thumb
-
-@ ---------------------------------------------------------------------------
.thumb_func
+#endif
.global memchr
.type memchr,%function
ENTRY(memchr)
@@ -83,20 +85,28 @@
orr r1, r1, r1, lsl #8 @ expand the match word across to all bytes
orr r1, r1, r1, lsl #16
- bic r4, r2, #7 @ Number of double words to work with * 8
+ bic r6, r2, #7 @ Number of double words to work with * 8
mvns r7, #0 @ all F's
movs r3, #0
15:
- ldrd r5,r6, [r0],#8
- subs r4, r4, #8
- eor r5,r5, r1 @ Get it so that r5,r6 have 00's where the bytes match the target
- eor r6,r6, r1
+ ldrd r4,r5, [r0],#8
+#ifndef NO_THUMB
+ subs r6, r6, #8
+#endif
+ eor r4,r4, r1 @ Get it so that r4,r5 have 00's where the bytes match the target
+ eor r5,r5, r1
+ uadd8 r4, r4, r7 @ Parallel add 0xff - sets the GE bits for anything that wasn't 0
+ sel r4, r3, r7 @ bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
uadd8 r5, r5, r7 @ Parallel add 0xff - sets the GE bits for anything that wasn't 0
- sel r5, r3, r7 @ bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
- uadd8 r6, r6, r7 @ Parallel add 0xff - sets the GE bits for anything that wasn't 0
- sel r6, r5, r7 @ chained....bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
- cbnz r6, 60f
+ sel r5, r4, r7 @ chained....bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
+#ifndef NO_THUMB
+ cbnz r5, 60f
+#else
+ cmp r5, #0
+ bne 60f
+ subs r6, r6, #8
+#endif
bne 15b @ (Flags from the subs above) If not run out of bytes then go around again
pop {r4,r5,r6,r7}
@@ -110,13 +120,24 @@
and r2,r2,#7 @ Leave the count remaining as the number after the double words have been done
20:
+#ifndef NO_THUMB
cbz r2, 40f @ 0 length or hit the end already then not found
+#else
+ cmp r2, #0
+ beq 40f
+#endif
21: @ Post aligned section, or just a short call
ldrb r3,[r0],#1
+#ifndef NO_THUMB
subs r2,r2,#1
eor r3,r3,r1 @ r3 = 0 if match - doesn't break flags from sub
cbz r3, 50f
+#else
+ eors r3, r3, r1
+ beq 50f
+ subs r2, r2, #1
+#endif
bne 21b @ on r2 flags
40:
@@ -129,22 +150,22 @@
60: @ We're here because the fast path found a hit - now we have to track down exactly which word it was
@ r0 points to the start of the double word after the one that was tested
- @ r5 has the 00/ff pattern for the first word, r6 has the chained value
+ @ r4 has the 00/ff pattern for the first word, r5 has the chained value
cfi_restore_state
- cmp r5, #0
+ cmp r4, #0
itte eq
- moveq r5, r6 @ the end is in the 2nd word
+ moveq r4, r5 @ the end is in the 2nd word
subeq r0,r0,#3 @ Points to 2nd byte of 2nd word
subne r0,r0,#7 @ or 2nd byte of 1st word
@ r0 currently points to the 2nd byte of the word containing the hit
- tst r5, # CHARTSTMASK(0) @ 1st character
+ tst r4, # CHARTSTMASK(0) @ 1st character
bne 61f
adds r0,r0,#1
- tst r5, # CHARTSTMASK(1) @ 2nd character
+ tst r4, # CHARTSTMASK(1) @ 2nd character
ittt eq
addeq r0,r0,#1
- tsteq r5, # (3<<15) @ 2nd & 3rd character
+ tsteq r4, # (3<<15) @ 2nd & 3rd character
@ If not the 3rd must be the last one
addeq r0,r0,#1
Modified: fsf/trunk/libc/ports/sysdeps/arm/memcpy.S
==============================================================================
--- fsf/trunk/libc/ports/sysdeps/arm/memcpy.S (original)
+++ fsf/trunk/libc/ports/sysdeps/arm/memcpy.S Thu Mar 14 00:02:19 2013
@@ -20,6 +20,7 @@
/* Thumb requires excessive IT insns here. */
#define NO_THUMB
#include <sysdep.h>
+#include <arm-features.h>
/*
* Data preload for architectures that support it (ARM V5TE and above)
@@ -89,7 +90,12 @@
CALGN( bcs 2f )
CALGN( adr r4, 6f )
CALGN( subs r2, r2, r3 ) @ C gets set
- CALGN( add pc, r4, ip )
+#ifndef ARM_ALWAYS_BX
+ CALGN( add pc, r4, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2))
+#else
+ CALGN( add r4, r4, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2))
+ CALGN( bx r4 )
+#endif
PLD( pld [r1, #0] )
2: PLD( subs r2, r2, #96 )
@@ -108,27 +114,64 @@
5: ands ip, r2, #28
rsb ip, ip, #32
- addne pc, pc, ip @ C is always clear here
+#ifndef ARM_ALWAYS_BX
+ /* C is always clear here. */
+ addne pc, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
b 7f
+#else
+ beq 7f
+ push {r10}
+ cfi_adjust_cfa_offset (4)
+ cfi_rel_offset (r10, 0)
+ add r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+ bx r10
+#endif
+ .p2align ARM_BX_ALIGN_LOG2
6: nop
+ .p2align ARM_BX_ALIGN_LOG2
ldr r3, [r1], #4
+ .p2align ARM_BX_ALIGN_LOG2
ldr r4, [r1], #4
+ .p2align ARM_BX_ALIGN_LOG2
ldr r5, [r1], #4
+ .p2align ARM_BX_ALIGN_LOG2
ldr r6, [r1], #4
+ .p2align ARM_BX_ALIGN_LOG2
ldr r7, [r1], #4
+ .p2align ARM_BX_ALIGN_LOG2
ldr r8, [r1], #4
+ .p2align ARM_BX_ALIGN_LOG2
ldr lr, [r1], #4
- add pc, pc, ip
+#ifndef ARM_ALWAYS_BX
+ add pc, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
nop
+#else
+ add r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+ bx r10
+#endif
+ .p2align ARM_BX_ALIGN_LOG2
nop
+ .p2align ARM_BX_ALIGN_LOG2
str r3, [r0], #4
+ .p2align ARM_BX_ALIGN_LOG2
str r4, [r0], #4
+ .p2align ARM_BX_ALIGN_LOG2
str r5, [r0], #4
+ .p2align ARM_BX_ALIGN_LOG2
str r6, [r0], #4
+ .p2align ARM_BX_ALIGN_LOG2
str r7, [r0], #4
+ .p2align ARM_BX_ALIGN_LOG2
str r8, [r0], #4
+ .p2align ARM_BX_ALIGN_LOG2
str lr, [r0], #4
+
+#ifdef ARM_ALWAYS_BX
+ pop {r10}
+ cfi_adjust_cfa_offset (-4)
+ cfi_restore (r10)
+#endif
CALGN( bcs 2b )
@@ -147,7 +190,8 @@
strbcs r4, [r0], #1
strbcs ip, [r0]
-#if defined (__ARM_ARCH_4T__) && defined(__THUMB_INTERWORK__)
+#if ((defined (__ARM_ARCH_4T__) && defined(__THUMB_INTERWORK__)) \
+ || defined (ARM_ALWAYS_BX))
pop {r0, r4, lr}
cfi_adjust_cfa_offset (-12)
cfi_restore (r4)
Modified: fsf/trunk/libc/ports/sysdeps/arm/memmove.S
==============================================================================
--- fsf/trunk/libc/ports/sysdeps/arm/memmove.S (original)
+++ fsf/trunk/libc/ports/sysdeps/arm/memmove.S Thu Mar 14 00:02:19 2013
@@ -20,6 +20,7 @@
/* Thumb requires excessive IT insns here. */
#define NO_THUMB
#include <sysdep.h>
+#include <arm-features.h>
/*
* Data preload for architectures that support it (ARM V5TE and above)
@@ -105,7 +106,12 @@
CALGN( bcs 2f )
CALGN( adr r4, 6f )
CALGN( subs r2, r2, ip ) @ C is set here
- CALGN( add pc, r4, ip )
+#ifndef ARM_ALWAYS_BX
+ CALGN( add pc, r4, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2))
+#else
+ CALGN( add r4, r4, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2))
+ CALGN( bx r4 )
+#endif
PLD( pld [r1, #-4] )
2: PLD( subs r2, r2, #96 )
@@ -124,27 +130,64 @@
5: ands ip, r2, #28
rsb ip, ip, #32
- addne pc, pc, ip @ C is always clear here
+#ifndef ARM_ALWAYS_BX
+ /* C is always clear here. */
+ addne pc, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
b 7f
+#else
+ beq 7f
+ push {r10}
+ cfi_adjust_cfa_offset (4)
+ cfi_rel_offset (r10, 0)
+ add r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+ bx r10
+#endif
+ .p2align ARM_BX_ALIGN_LOG2
6: nop
+ .p2align ARM_BX_ALIGN_LOG2
ldr r3, [r1, #-4]!
+ .p2align ARM_BX_ALIGN_LOG2
ldr r4, [r1, #-4]!
+ .p2align ARM_BX_ALIGN_LOG2
ldr r5, [r1, #-4]!
+ .p2align ARM_BX_ALIGN_LOG2
ldr r6, [r1, #-4]!
+ .p2align ARM_BX_ALIGN_LOG2
ldr r7, [r1, #-4]!
+ .p2align ARM_BX_ALIGN_LOG2
ldr r8, [r1, #-4]!
+ .p2align ARM_BX_ALIGN_LOG2
ldr lr, [r1, #-4]!
- add pc, pc, ip
+#ifndef ARM_ALWAYS_BX
+ add pc, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
nop
+#else
+ add r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+ bx r10
+#endif
+ .p2align ARM_BX_ALIGN_LOG2
nop
+ .p2align ARM_BX_ALIGN_LOG2
str r3, [r0, #-4]!
+ .p2align ARM_BX_ALIGN_LOG2
str r4, [r0, #-4]!
+ .p2align ARM_BX_ALIGN_LOG2
str r5, [r0, #-4]!
+ .p2align ARM_BX_ALIGN_LOG2
str r6, [r0, #-4]!
+ .p2align ARM_BX_ALIGN_LOG2
str r7, [r0, #-4]!
+ .p2align ARM_BX_ALIGN_LOG2
str r8, [r0, #-4]!
+ .p2align ARM_BX_ALIGN_LOG2
str lr, [r0, #-4]!
+
+#ifdef ARM_ALWAYS_BX
+ pop {r10}
+ cfi_adjust_cfa_offset (-4)
+ cfi_restore (r10)
+#endif
CALGN( bcs 2b )
@@ -163,7 +206,8 @@
strbcs r4, [r0, #-1]!
strbcs ip, [r0, #-1]
-#if defined (__ARM_ARCH_4T__) && defined (__THUMB_INTERWORK__)
+#if ((defined (__ARM_ARCH_4T__) && defined (__THUMB_INTERWORK__)) \
+ || defined (ARM_ALWAYS_BX))
pop {r0, r4, lr}
cfi_adjust_cfa_offset (-12)
cfi_restore (r4)
Modified: fsf/trunk/libc/timezone/zic.c
==============================================================================
--- fsf/trunk/libc/timezone/zic.c (original)
+++ fsf/trunk/libc/timezone/zic.c Thu Mar 14 00:02:19 2013
@@ -1748,7 +1748,7 @@
minutes = offset % MINSPERHOUR;
offset /= MINSPERHOUR;
hours = offset;
- if (hours >= HOURSPERDAY) {
+ if (hours > HOURSPERDAY) {
result[0] = '\0';
return -1;
}
@@ -1851,7 +1851,9 @@
rp = &zp->z_rules[i];
if (stdrp == NULL || rp->r_hiyear > stdrp->r_hiyear ||
(rp->r_hiyear == stdrp->r_hiyear &&
- rp->r_month > stdrp->r_month))
+ (rp->r_month > stdrp->r_month ||
+ (rp->r_month == stdrp->r_month &&
+ rp->r_dayofmonth > stdrp->r_dayofmonth))))
stdrp = rp;
}
if (stdrp != NULL && stdrp->r_stdoff != 0)
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