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Re: [patches] powerpc 8xx dcbz problem



Steven Munroe wrote:

add the --with-cpu support as a way to manage this. You all might be
very annoyed with me, if I had 970/power4/power5/power5+/power6/power6x
specific code cluttering up performance sensitive common code!

This patch is not cluttering up performance sensitive common code. memset already has a check for whether the cache line size is zero. Please don't construct straw men :)

There is no hard and fast boundary where --with-cpu is the appropriate thing and where a dynamic check is the appropriate thing. For instance, it would be technically feasible to hard code the cache-line size from a --with cpu value, but that's not the approach that has been taken. The cache_line size is being set dynamically, and for 8xx CPUs it's being set to the wrong value (due to a bug in the 8xx). IMHO, given that the line-size check is dynamic, the right thing to do is dynamically check for 8xx.

That said, if you still disagree, I'll find another solution.

nathan

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Nathan Sidwell    ::   http://www.codesourcery.com   ::         CodeSourcery
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